Three-dimensional integrated sensor chip packaging structure and packaging method

Abstract

The invention discloses a three-dimensional integrated sensor chip packaging structure and packaging method. The packaging structure comprises a sensor chip and a substrate. The first surface of the sensor chip is provided with multiple first welding pads and an induction area, a first groove, a second groove and a third groove are carved in the second surface of the sensor chip, insulating layers and metal wiring layers are laid in the first groove, the second groove and the third groove, the sensor chip and a second welding pad on the substrate are connected together through a solder ball in a flip chip mode, and a plastic package layer is arranged on the outer side of the sensor chip. The packaging structure can reduce packaging thickness and meet the requirement for miniaturization development of the sensor chip. The special groove structures in the packaging structure and overall plastic package can be well combined with other functional chips, and use performance and reliability of the chips are enhanced. According to the packaging method, a wafer level chip size packaging technology is used, overall packaging is carried out firstly, then a wafer is cut into single chips, and accordingly production cost is lowered.

Description

technical field [0001] The invention relates to a wafer-level chip size packaging structure and technology, in particular to a three-dimensional integrated sensor chip packaging structure and packaging method. Background technique [0002] Sensor chips or sensor chips, such as fingerprint recognition sensor chips, touch sensor chips, etc., have been continuously expanded due to their simplicity and practicability. Smart terminal devices with increasingly powerful functions are also beginning to carry more and more sensor chips. However, current devices have higher requirements for short, light and thin packaging devices, and the packaging volume of such sensor chips equipped with them will also be pursued. minimize. [0003] However, conventional wafer-level sensor chip size packaging usually uses a wire bonding process to connect the sensor chip to the substrate. The specific structure is: the sensor chip has a first surface and a second surface opposite to the first surfa...

AI Technical Summary

Problems solved by technology

In this form of sensor chip packaging structure, the wire bonding between the sensor chip and the substrate is easily crushed and broken, and no other dielectric layer can be placed above the wire bonding, which affects the packaging yield of the product and reduces the product quality. reliability

Due to the limitation of the wire bonding process, the thickness of the sensor chip package completed by this process is relatively large, which cannot meet the requirement of minimizing the package volume.

In addition, this packaging structure is not conducive to combining with other functional chips, and the sensor chip has a single function

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