FPGA (field programmable gate array) removable high-speed operation verification development board

A development board, high-speed technology, applied in the field of verification development board, can solve problems such as expensive, FPGA chip damage, speed can not meet the demand, etc., to achieve the effect of easy disassembly and assembly, and meet the needs of design verification

Active Publication Date: 2015-05-13
SHANDONG HUAYI MICRO ELECTRONICS
View PDF9 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Usually, the FPGA chip is directly soldered on the development board, or the FPGA chip is soldered on the PCB adapter board, and then connected to the development board through the adapter board. There is a problem: when the FPGA chip is damaged or the capacity and speed of the FPGA cannot To meet the demand, when it needs to be replaced, it will be very troublesome to replace the FPGA chip, requiring professional equipment, and the expensive FPGA chip may be damaged during the operation

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA (field programmable gate array) removable high-speed operation verification development board
  • FPGA (field programmable gate array) removable high-speed operation verification development board

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] The present invention will be further described and defined below in conjunction with the accompanying drawings and specific embodiments.

[0015] Such as figure 1 Shown, a kind of FPGA detachable and the verification development board of high-speed operation, comprise development board 3, be positioned at the socket 2 on the development board 3 and detachably be connected on the FPGA chip 1 on the socket 2, development board 3 is provided with and The pad corresponding to the packaging form of the socket 2, the socket 2 is soldered on the pad; the socket 2 is provided with a pin 5 corresponding to the solder ball of the FPGA chip 1, and the upper end of the pin 5 is connected to the solder ball of the FPGA chip 1 The lower end is connected to the wiring on the development board 3, and the FPGA chip 1 is electrically connected to each component on the development board 3 through the pin 5 of the socket 2.

[0016] In this embodiment, the FPGA chip 1 is detachably conne...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an FPGA removable high-speed operation verification development board. The FPGA removable high-speed operation verification development board comprises a development board body, a socket arranged on the development board body, and an FPGA chip detachably connected to the socket. The development board body is provided with a bonding pad corresponding to the encapsulation mode of the socket, and the socket is welded to the bonding pad; the socket is provided with base pins corresponding to the solder ball of the FPGA chip, the upper ends of the base pins are connected with the solder ball of the FPGA chip, and the lower ends of the base pins are connected with wires on the development board body; the FPGA chip is electrically connected with elements on the development board body through the base pins of the socket; for matching with the characteristic of high operating speed of the FPGA chip, high speed data storages including a Flash chip, a FRAM (flash random-access memory) chip and a DDR (double data rate 3) chip are arranged around the FPGA chip, and the chips can be called separately as well as simultaneously to ensure high-speed operation of the development board body. The FPGA chip can be manually mounted and removed on the development board without other equipment, thereby being convenient to remove, avoiding damage and achieving mounting and removing repeatability; meanwhile, the FPGA removable high-speed operation verification development board gives full play to the advantage of the FPGA which can parallel-process data, thereby fully meeting the requirements of design verification.

Description

technical field [0001] The invention relates to an FPGA-based verification and development board, in particular to a verification and development board with detachable FPGA and high-speed operation, belonging to the field of computer hardware. Background technique [0002] The verification development board based on FPGA (Field Programmable Gate Array, Field Programmable Gate Array) is a circuit board developed to meet the needs of design verification by utilizing the advantages of FPGA chip field programmable and data parallel processing. High-speed FPGA chip. Usually, the FPGA chip is directly soldered on the development board, or the FPGA chip is soldered on the PCB adapter board, and then connected to the development board through the adapter board. There is a problem: when the FPGA chip is damaged or the capacity and speed of the FPGA cannot To meet the demand, when it needs to be replaced, it will be very troublesome to replace the FPGA chip, requiring professional eq...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G09B23/18G05B19/042
CPCG09B23/186
Inventor 王磊王明宇邓波
Owner SHANDONG HUAYI MICRO ELECTRONICS
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products