Asynchronous decoder and asynchronous decoding method for BMC (Biphase Mark Coding) signal
A decoder and signal technology, which is applied in the field of asynchronous decoders, can solve problems such as poor performance and receiving data errors, and achieve the effects of fast self-adaptation, accurate decoding, and avoiding receiving data errors
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[0019] combine figure 2 The realization principle of the asynchronous decoder of the BMC signal as shown is as follows:
[0020] A clock with a frequency much higher than the bit rate of the BMC signal is used as the sampling clock, that is, the clock signal clk, and a level counter is used to record the number of clock signals counted in the low level or high level of the BMC signal being received. At the reset point of the level counter, the level counter is cleared to 0 and then counted.
[0021] Use a register to record the number of sampling points of the half-bit width of the BMC signal (hereinafter referred to as the number of half-bit samples). Afterwards, at the decision point of each data, compare the value of the level counter with the number of half-bit samples, and if the value of the level counter is between 1.5 times and 2.5 times the number of half-bit samples, it is received If the value of the level counter is between 0.75 times and 1.5 times the number of...
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