Content-addressable memory

Abstract

The invention discloses a content-addressable memory including: a data storage unit; a shield storage unit; and a comparison and reading unit, which is connected to at least one reading word line to receive at least one reading word signal, is connected to at least one functional bit line to receive a searching bit signal and is coupled to the data storage unit and the shield storage unit to receive the data bits and the shield bits. The data storage unit is connected to a data-use writing word line to receive a data writing word signal and the shield storage unit is connected to a shield-use writing word line to receive a shield writing word signal, so that a writing bit signal is controlled and it is determined whether the writing bit signal can be written to the data bits and the shield bits through a pair of writing bit lines or not. The comparison and reading unit compares the data bits, the shield bits and the searching bit signal to determine whether they are matched with each other. Meanwhile, the comparison and reading unit determines whether the data bits and the shield bits can be read according to the at least one reading word signal.

Description

technical field [0001] The present invention relates to a content addressable memory (CAM for short), especially a ternary content addressable memory (TCAM for short). Background technique [0002] Content-addressable memory includes a plurality of content-addressable memory cells (CAM cells) arranged in an array, and compares its stored content with a search data in units of columns to see if they match (match), so as to generate a plurality of CAM cells corresponding to the columns. match bits. Depending on the number of states each CAM can store, the CAM can be binary, triple, or otherwise. [0003] When the content addressable memory is a dual content addressable memory, each content addressable memory unit includes a data storage unit and a comparison circuit, wherein the data storage unit stores a data bit and a complementary data bit, so as to Indicates one of the two logical states of "0" and "1". When the content-addressable memory is triple content-addressable m...

AI Technical Summary

Problems solved by technology

However, when a plurality of memory cells are arranged in an array or a matrix, interference in the direction of the word line often occurs, that is, although the logic state of the word line is "1", no read or write operation is performed. Problems that easily lead to data loss

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