CMOS (complementary metal oxide semiconductor) focal plane reading-out circuit and signal reading-out control method

Abstract

The invention discloses a CMOS (complementary metal oxide semiconductor) focal plane reading-out circuit. The CMOS focal plane reading-out circuit is creatively characterized in that position of a certain pixel in a two-dimensional focal plane array is expressed by using a mark Celln,m, wherein n refers to number of a row where the pixel is positioned in the two-dimensional focal plane array, and m refers to number of a column where the pixel is positioned in the two-dimensional focal plane array; an output end of the pixel marked as Celln,m is electrically connected with output ends of four pixels marked as Celln-1, Celln+1, Celln,m-1 and Celln,m+1; a connecting switch is arranged on a connecting lead. The CMOS focal plane reading-out circuit has the advantages that selective flow-in of photo-generated current output by the pixel to a sampling unit can be realized through a switch, sensitivity of a focal plane imaging system is improved, and dynamic range of the focal plane imaging system is expanded.

Description

technical field [0001] The invention relates to a CMOS focal plane readout technology, in particular to a CMOS focal plane readout circuit and a signal readout control method. Background technique [0002] The focal plane imaging system consists of two parts, the focal plane imaging device (namely the focal plane array) and the focal plane readout circuit. The basic principle is: the photo-generated current generated by the pixel on the focal plane array is conducted to the sampling unit of the readout circuit through the indium column, and the photo-generated current signal is sampled by the sampling unit and integrated, then converted into a corresponding voltage signal, and then passed through The subsequent column-level processing circuit buffers the readout and finally forms the image; common sampling units in the prior art such as capacitive feedback transimpedance amplifier (CTIA) sampling unit, direct injection (DI) sampling unit, source follower type (SFD) Sampling...

AI Technical Summary

Problems solved by technology

[0003] The problem existing in the prior art is: in the existing focal plane imaging system, multiple pixels in the focal plane array and the sampling unit adopt a one-to-one correspondence connection mode, that is, the output signal of one pixel is processed by one sampling unit; In some occasions, it may appear that the photo-generated signal output by the pixel is relatively weak. At this time, the weak photo-generated signal may be submerged in the noise of the device, making it difficult for the sampling unit to sample and output it.

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