LDO circuit applied to HSIC connector whole chip integration

Abstract

The invention discloses an LDO circuit applied to HSIC connector whole chip integration. The LDO circuit comprises an error amplifier, a matched NMOS transistor, a grid electrode filter capacitor, a matched current source, a power NMOS transistor, an output stage filter capacitor and an NMOS transistor. The error amplifier, the matched NMOS transistor, the grid electrode filter capacitor and the matched current source form a low-frequency control loop of the LDO circuit. The power NMOS transistor serves as the output stage of the LDO circuit. The NMOS transistor is a high-speed response pipe and serves as the load of the LDO circuit. By means of the LDO circuit, external capacitor elements can be omitted, and wiring of a PCB is facilitated; the response speed is high.

Description

technical field [0001] The invention relates to an LDO (low dropout regulator) circuit, in particular to an LDO circuit applied to full-chip integration of HSIC interfaces. Background technique [0002] HSIC (high speed inter-chip USB high-speed inter-chip interface) is an interface protocol introduced in 2007 for high-speed interconnection between chips. HSIC is proposed on the basis of USB2.0. HSIC utilizes 240M DDR (double rate) signals synchronous with 2-wire sources to provide high-speed 480Mbps (megabit / second) USB (universal serial bus) transmission. HSIC can be widely used in board-level chip-level interconnection, replacing low-speed interfaces such as I2C (two-wire serial bus), SPI (serial peripheral interface), and realizing high-speed interconnection between chips. Compared with USB, HSIC has an output interface of 1.2VLVCMOS (Low Voltage Complementary Metal Oxide Semiconductor) level. For the 0.18μm process, the chip's CORE (core) supply voltage is 1.8V, and ...

AI Technical Summary

Problems solved by technology

This implementation method can obtain a stable 1.2V voltage, but its disadvantage is that an external filter capacitor is required, which increases the number of chip pins and external components.

Images