Packaging substrate, preparing method thereof, semiconductor package, and preparing method thereof

A technology for packaging substrates and semiconductors, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as low manufacturing yield, difficult alignment, sliding offset, etc., and achieve improved positioning and bonding , Avoid sliding offset, improve manufacturing yield and product quality

Active Publication Date: 2015-07-29
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0006] However, in the existing manufacturing method of the semiconductor package, because the end surfaces of the metal pillars 19 are all flat, the alignment is not easy. However, even after the correct alignment, it is easy to carry out surface bonding of the metal pillars. The problem of sliding offset occurs, and finally makes the manufacturing yield low

Method used

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  • Packaging substrate, preparing method thereof, semiconductor package, and preparing method thereof
  • Packaging substrate, preparing method thereof, semiconductor package, and preparing method thereof
  • Packaging substrate, preparing method thereof, semiconductor package, and preparing method thereof

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Embodiment Construction

[0051] The implementation of the present invention is described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0052] It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for the understanding and reading of those familiar with this technology, and are not used to limit the implementation of the present invention Therefore, it has no technical substantive meaning. Any modification of structure, change of proportional relationship or adjustment of size shall still fall within the scope of this invention without affecting the effect and purpose of the present invention. The technical content disclosed by the invention must be within the scope covered. At the same time, terms such as "above" and "a" q...

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Abstract

The invention provides a packaging substrate, a preparing method thereof, a semiconductor package and a preparing method thereof. The packaging substrate comprises the components of a layered body; a plurality of conductive components which are formed on the surface of the layered body; and a positioning structure which is formed on each corresponding conductive component, thereby settling a problem of positioning joint between packaging components in the vertical direction by means of the positioning structure, and improving manufacture yield and product quality.

Description

technical field [0001] The invention relates to a package substrate and a semiconductor package, in particular to a package substrate with improved yield, a semiconductor package and a manufacturing method thereof. Background technique [0002] With the evolution of semiconductor packaging technology, semiconductor packages have developed different packaging types, and various electronic products are increasingly required to be light, thin and small in size, so it can save the substrate plane area and take into account the processing performance at the same time Embedded package (embedded package) is getting more and more attention. [0003] Figures 1A to 1C In order to show the manufacturing method of the existing in-cell package. Such as Figure 1A As shown, a chip 12 is placed on the lower substrate 1 , and a plurality of conductive elements such as metal pillars 19 are formed on the surface of the lower substrate 1 around the chip 12 . [0004] Such as Figure 1B As...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L23/492H01L21/48
CPCH01L2224/16225H01L2924/15311H01L2924/181H01L2924/00012
Inventor 江政嘉王愉博王隆源施嘉凯徐逐崎
Owner SILICONWARE PRECISION IND CO LTD
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