Semiconductor structure and layout structure of memory element

Abstract

The invention discloses a semiconductor structure and a layout structure of a memory element. The layout structure of the memory element comprises a plurality of first gate patterns, a plurality of first contact pad patterns, a plurality of dummy patterns, a plurality of second contact pad patterns and a plurality of second gate patterns, wherein the first contact patterns are mutually parallel and electrically connected with the first gate patterns; the dummy patterns and the first contact patterns are arranged in a staggered mode, and each second contact pattern is arranged between on first contact pattern and one dummy pattern. In addition, the second gate patterns are electrically connected to the second contact patterns respectively.

Description

technical field [0001] The invention relates to a semiconductor structure and a layout structure of a memory element, in particular to a semiconductor structure and a layout structure of a flash memory element. Background technique [0002] Semiconductor memory devices are commonly used in various electronic devices. For example, non-volatile semiconductor memory (non-volatile semiconductor memory) is often used in mobile phones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other device. Among non-volatile semiconductor memories, Electrically Erasable Programmable Read Only Memory (EEPROM) and flash memory are the most widely used non-volatile semiconductor memories. memory. [0003] However, with the progress of the semiconductor manufacturing process and the shrinkage of the components, the semiconductor memory components are faced with more challenges. For example, a conventional flash memory cell includes a m...

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Problems solved by technology

As the tolerance (process window) of the device and the manufacturing process shrinks, the misalignment between the select gate and the contact plug will affect the performance of the device more and more, and even lead to the failure of the flash memory device.

In addition, when the selection gate is a spacer-type selection gate, it has an inclined and uneven surface, so the contact plug disposed on the selection gate and must be in physical contact with the selection gate is not easy to contact with the selection gate. Surfaces are actually in contact, which raises reliability issues

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