Methods for manufacturing germanium layer and semiconductor device

Abstract

The invention provides methods for manufacturing a germanium layer and a semiconductor device, and the method for manufacturing the germanium layer comprises the steps: dividing one-step growth, consuming longer time, of a germanium PVD into multi-step growth, consuming shorter time, of the germanium PVD, wherein the sum of thicknesses of deposited germanium at all steps is the required total thickness of the germanium layer, thereby breaking a continuous aggregation process of charges on the surface of a target material; adding a step of large-flow high-pressure air blowing after each divided step of deposition, so as to blow away the charges accumulated on the surface of the target material, thereby reducing the phenomena of arc discharge between the target material and a plasma gun, protecting the target material from being melt partially, reducing the number of spattered particles falling onto a deposition surface after the target material is melt, and finally reducing the defect rate of particles on a deposited germanium layer surface remarkably on the basis of maintaining the total deposition thickness of the germanium layer. The method for manufacturing the semiconductor device employs the method for manufacturing the germanium layer, and improves the performance of the device and the integration qualified rate of the device.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a germanium layer and a semiconductor device. Background technique [0002] Intelligent network terminals such as smartphones and tablet computers have gradually become the necessary communication tools and platforms for handling affairs that people carry with them. As a result, various micro sensors have begun to enter these intelligent network terminals. Integrating more functions, the miniaturization of sensors based on MEMS (Micro-Electro-Mechanical System) technology has become one of the focuses of major companies and related researchers. [0003] At present, integrated circuits (ICs) have achieved wafer-level packaging. On the basis of referring to the wafer-level packaging technology of integrated circuits, a technical solution for the wafer-level packaging process of MEMS devices is proposed for the characteristics of MEMS devices. Sp...

AI Technical Summary

Problems solved by technology

This kind of deposition defect has a certain height and becomes a suspended structure on the surface of the MEMS wafer. It may cause the top of the MEMS wafer to be in direct electrical contact with the ASIC wafer after the bonding of the MEMS wafer and the ASIC wafer, resulting in failure and impact. Device performance

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