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Device for solving direct current balance of BLVDS bus

A DC balance and bus technology, applied in the fields of instruments, electrical digital data processing, etc., can solve the problems of increasing difficulty in program processing, high bus bandwidth requirements, low efficiency, etc., saving resources, solving DC balance problems, and high efficiency. Effect

Active Publication Date: 2015-09-02
NANJING GUODIAN NANZI WEIMEIDE AUTOMATION CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Each symbol of Manchester encoding contains a rising edge or a falling edge, which requires high bus bandwidth and is inefficient
8B / 10B encoding requires more complex programming, which increases the difficulty of program processing

Method used

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  • Device for solving direct current balance of BLVDS bus

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Embodiment Construction

[0016] The present invention will be further described below in conjunction with the accompanying drawings.

[0017] Such as figure 1 As shown, a kind of device that solves the DC balance problem of BLVDS bus comprises: CPU chip 1, FPGA chip 2, BLVDS bus 3, and described FPGA chip 2 comprises: serial data transceiving module 21, memory 22, plug-in module 23, BLVDS data transceiver module 24, code reduction module 25;

[0018] The CPU chip 1 is connected with one end of the serial data transceiver module 21, and the other two ends of the serial data transceiver module 21 are connected with the memory 22 and the code insertion module 23 respectively; the other end of the memory 22 is connected with the BLVDS data transceiver module 24; The code insertion module 23 , the BLVDS data transceiver module 24 and the code reduction module 25 are connected in parallel to the BLVDS bus 3 .

[0019] The specific usage is as follows:

[0020] Situation 1: The working process of sending ...

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PUM

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Abstract

The invention discloses a device for solving direct current balance of a BLVDS bus. The device includes a CPU chip, a FPGA chip, and a BLVDS bus; the FPGA chip includes a serial data receiving and dispatching module, a memory, a code inserting module, a BLVDS data receiving and dispatching module, and a code reducing module; the CPU chip is connected to one end of the serial data receiving and dispatching module, and another two ends of the serial data receiving and dispatching module are connected with the memory and the code inserting module; the other end of the memory is connected with the BLVDS data receiving and dispatching module; the code inserting module, the BLVDS data receiving and dispatching module and the code reducing module are linked in parallel and then connected to the BLVDS bus. The device for solving direct current balance of the BLVDS bus can perform the real-time treatment on the serial data by using the FPGA chip; the efficiency is high, and CPU needs not to perform any change. The expandability is strong, and a plurality of BLVDS buses can be expanded by a piece of FPGA, thus the resource is saved.

Description

technical field [0001] The invention relates to a device for solving the DC balance problem of a BLVDS bus, which belongs to the technical field of the BLVDS bus. Background technique [0002] BLVDS (Bus Low Voltage Differential Signal) bus has 250mV low voltage differential signal and fast transition time. Its anti-interference characteristics and high-speed data transmission characteristics make it widely used in multi-point cables and backplanes. However, when serial communication of data is carried out with the BLVDS bus, the problem of DC balance also appears thereupon. At present, there are Manchester coding and 8b-10b coding to solve the DC balance problem. Each symbol of Manchester encoding includes a rising edge or a falling edge, which requires high bus bandwidth and is inefficient. 8B / 10B encoding requires more complex programming, which increases the difficulty of program processing. Contents of the invention [0003] Purpose: In order to overcome the defici...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40
CPCG06F13/40
Inventor 李伟黄作兵乐凌志黄蕾赵永
Owner NANJING GUODIAN NANZI WEIMEIDE AUTOMATION CO LTD
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