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Semiconductor chip and semiconductor package

一种半导体、芯片的技术,应用在半导体器件、半导体/固态器件零部件、电固体器件等方向,能够解决差动信号特性恶化等问题,达到提高差动特性的效果

Inactive Publication Date: 2015-09-16
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] When it is desired to connect the pad electrodes of the differential signal pair to the semiconductor package substrate through bonding wires from the semiconductor chip, the distance of the wiring from the pad electrodes of the semiconductor chip to the package balls is reversed. The difference between the signal and the in-phase signal, the characteristics of the differential signal will deteriorate

Method used

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  • Semiconductor chip and semiconductor package
  • Semiconductor chip and semiconductor package
  • Semiconductor chip and semiconductor package

Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach

[0040] figure 1 It is a plan view showing an example of the structure of the semiconductor package 100 according to the first embodiment. also, figure 2 yes yes figure 1 The region F of the semiconductor package 100 shown is a plan view of an example of the structure of interest. also, image 3 yes means figure 2 It is a plan view showing an example of the connection relationship between the differential amplifier circuit and the pad electrode in each IO cell region shown.

[0041] In addition, in figure 1 In , the encapsulation resin, pad electrodes, bonding wires, and bonding fingers are omitted.

[0042] Such as figure 1 As shown, the semiconductor package 100 includes a semiconductor chip 1 and a base substrate 2 .

[0043] The base substrate 2 is made of, for example, an insulating material, and the semiconductor chip 1 can be mounted on the upper surface thereof. In addition, on the base substrate 2, the semiconductor chip 1 is packaged with a sealing resin (n...

no. 2 approach

[0108] Figure 8 is true figure 1 The region F of the illustrated semiconductor package 100 is a plan view of another example of the structure of interest. also, Figure 9 yes means Figure 8 It is a plan view showing an example of the connection relationship between the differential amplifier circuit and the pad electrode in each IO cell region shown.

[0109] and, if Figure 8 As shown, the group of the same-phase pad electrode and the reverse-phase pad electrode (the first group of the first common-phase pad electrode P1 and the first reverse-phase pad electrode N1, the second same-phase pad electrode P2 and the second group of the second inverting pad electrode N2, the third group of the third non-inverting pad electrode P3 and the third group of the third inverting pad electrode N3) are arranged in two along the side 1a of the semiconductor chip 1. Column(Y1, Y2).

[0110] In particular, the first in-phase pad electrode P1 and the first inversion pad electrode N1 of...

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PUM

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Abstract

The driver semiconductor package includes a base substrate. The semiconductor package includes a semiconductor chip mounted on the base substrate. The semiconductor chip includes a core region disposed in a center part of the semiconductor chip, an internal circuit being provided in the core region. The semiconductor chip includes a plurality of IO cell regions disposed in a line along a side of the semiconductor chip, a differential circuit being provided in each of the plurality of IO cell regions. The semiconductor chip includes a non-inverting pad electrode disposed above each of the IO cell regions and electrically connected to a non-inverting terminal of the differential circuit. The semiconductor chip includes an inverting pad electrode disposed above each of the IO cell regions and connected to an inverting terminal of the differential circuit.

Description

[0001] Citations from related applications: [0002] This application is based on the benefit of priority based on Japanese Patent Application No. 2014-049393 for which it applied on March 12, 2014, and seeks this benefit, The content is taken in here as a whole by reference. technical field [0003] Embodiments relate to semiconductor chips and semiconductor packages. Background technique [0004] For example, in a semiconductor package, when a differential signal is input and output to a pad electrode disposed on an IO cell area of ​​a semiconductor chip, it is necessary to input and output an inverted signal and a non-inverted signal to the IO cell. different pad electrodes on the area. [0005] When it is desired to connect the pad electrodes of the differential signal pair to the semiconductor package substrate through bonding wires from the semiconductor chip, the distance of the wiring from the pad electrodes of the semiconductor chip to the package balls is reversed...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488
CPCH01L24/05H01L24/49H01L2224/05552H01L2924/386H01L2224/48101H01L24/06H03K19/17744H01L24/48H01L2224/06139H01L2224/49431H01L2224/48011H01L2224/4912H03K19/018514H01L23/528H01L2924/00014H01L23/481H01L2224/48091H01L2224/05554G06F17/5068H01L2224/06135H01L2224/49433G06F30/39H01L2224/06133H01L2224/45099H01L2224/05599H01L23/482H01L23/49503H01L29/40
Inventor 福田翔平
Owner KK TOSHIBA