A Lithography Process Rules Inspection Method Introducing Overlay Errors
A technology of photolithography process and inspection method, which is applied in the direction of photoplate making process, optics, and originals for photomechanical processing on the pattern surface, and can solve the problem that the process window is not taken into account.
Active Publication Date: 2019-07-19
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology
However, the process window for overlay accuracy during lithography is not taken into account
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[0029] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0030] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.
[0031] In the following specific embodiments of the present invention, please refer to figure 1 , figure 1 It is a flow chart of a method for checking lithography process rules that introduces overlay errors in the present invention. Such as figure 1 As shown, a method for checking lithography process rules that introduces an overlay error of the ...
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The invention discloses an overlay error-guided photolithography technique rule detection method. The method comprises the following steps: defining a group of detection rules related to multiple levels, guiding the related levels, and simulating a layout subjected to optical proximity effect correction so as to obtain a group of simulation pictures; performing photolithography technique rule detection without an overlay precision error; performing a series of changes on the simulation pictures, simulating the reduction of overlay precision, caused when an error is generated during photolithography alignment, and performing the photolithography technique rule detection by using the simulation pictures after being subjected to the series of geometrical changes in the current layer and the related levels; performing the optical proximity effect correction on the positions aiming at pictures contrary to the rules again; and performing the photolithography technique rule detection again on pictures after being subjected to the optical proximity effect correction again in the current layer until the condition that all technology weak points are repaired is determined, so that the optimization improvement on a photolithography technique rule detection method is realized.
Description
technical field [0001] The invention relates to the field of semiconductor manufacturing, and more particularly, to a method for checking the rules of a photolithography process that introduces overlay errors. Background technique [0002] With the rapid development of microelectronics technology, the design and manufacture of integrated circuits has entered the ultra-deep sub-micron stage, and the feature size is close to or even smaller than the wavelength of light used in the photolithography process, that is, the size of the mask pattern is close to or even smaller than that used to form the photolithography process. The wavelength of the light that engraves the pattern, thereby producing the optical proximity effect (OPE). In this case, the pattern on the mask will be deformed during transfer, and the lithographic quality of adjacent pattern regions on the mask pattern will be more and more affected by the optical proximity effect, so that on the actual silicon wafer T...
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IPC IPC(8): G03F1/84G03F1/36
CPCG03F1/36G03F1/84
Inventor 张辰明魏芳朱骏吕煜坤张旭升
Owner SHANGHAI HUALI MICROELECTRONICS CORP