Voltage conversion circuit
A voltage conversion circuit and circuit technology, applied in the field of circuits, can solve problems such as voltage instability
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Embodiment 1
[0016] figure 1 It is a voltage conversion circuit diagram provided by Embodiment 1 of the present invention. This embodiment is applicable to the case where the load requires a supply voltage with a narrow variation range. A voltage conversion circuit diagram provided in this embodiment, such as figure 1 As shown, it includes: a first-order charge pump 110 and a negative feedback loop 120 .
[0017] The first-order charge pump 110 includes an input terminal, an output terminal, a forward clock control terminal (CLKB) and a reverse clock control terminal (CLK). Under the control of the provided clock signal, an output voltage is formed and output from the output terminal to provide voltage for the load.
[0018] The negative feedback loop 120 includes a power supply terminal, a voltage feedback terminal and a feedback output terminal, the voltage feedback terminal is connected to the output terminal of the first-order charge pump, and is used to adjust the source voltage inp...
Embodiment 2
[0029] On the basis of the above examples, figure 2 It is the circuit diagram of the clock signal generator provided by Embodiment 2 of the present invention, such as figure 2 As shown, the input terminal of the clock signal generator is connected to the output terminal of an oscillator, and the output terminal is connected to the clock control terminal of the first-stage charge pump for adjusting the amplitude of the clock signal.
[0030] The clock signal processing circuit includes a first inverter T1, a second inverter T2, a third inverter T3, a fourth inverter T4 and a fifth inverter T5; wherein the first inverter , the second inverter and the third inverter are sequentially connected in series; the fourth inverter and the fifth inverter are connected in series with the first inverter, the second inverter and the third inverter devices in parallel.
[0031] The amplitude of the clock signal is finally determined by the supply voltage VC of T3 and T5, such as figure ...
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