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Formation and testing method of resistive memory

A resistive memory, resistive memory technology, applied in static memory, digital memory information, information storage and other directions, can solve the problem of inability to clearly distinguish the set current Iset, the decrease of the set current Iset, and the decline of the data retention performance of the resistive memory. and other problems, to achieve good results, improve yield, and increase performance.

Active Publication Date: 2017-11-10
WINBOND ELECTRONICS CORP
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  • Claims
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AI Technical Summary

Problems solved by technology

However, after the resistive memory is baked and tested, the set current Iset is likely to decrease, making it impossible to clearly distinguish the set current Iset and the reset current Ireset
Therefore, the data retention performance of the resistive memory will decrease

Method used

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  • Formation and testing method of resistive memory
  • Formation and testing method of resistive memory
  • Formation and testing method of resistive memory

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Embodiment Construction

[0032] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the preferred embodiments are specifically listed below, together with the accompanying drawings, and are described in detail as follows:

[0033] figure 1 A schematic diagram of a memory cell 100 of a resistive memory according to an embodiment of the invention is shown. The memory cell 100 includes a metal-insulator-metal element (metal-insulator-metal, hereinafter referred to as a MIM element) 110 and a transistor 120 . The MIM element 110 is coupled between the bit line BL and the transistor 120 , and the transistor 120 is coupled between the MIM element 110 and the source line SL, wherein the gate of the transistor 120 is coupled to the word line WL. exist figure 1 Among them, the resistance value of the MIM element 110 can be changed by applying a bias voltage to the MIM element 110 . For example, the resistance value of the MIM element 110 can b...

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Abstract

A resistive memory formation and test method is disclosed. A memory array comprises a plurality of resistive storage units; a processing module is used for sequentially providing a first formation voltage and a second formation voltage for the resistive storage units so as to enable the resistive storage units to switch from an insulation state to an impedance state; the processing module provides a reset voltage to the resistive storage units so as to transform the impedance state of the resistive storage units to first impedance; the processing module provides a set voltage to the resistive storage units so as to transform the impedance state of the resistive storage units from the first impedance to second impedance; and the set voltage is higher than the second formation voltage, and the second formation voltage is higher than the first formation voltage.

Description

technical field [0001] The present invention relates to a resistive memory, in particular to a method for forming and testing a resistive memory capable of improving data retention performance. Background technique [0002] At present, flash memory (Flash) is the mainstream of non-volatile memory, but with the continuous shrinking of components, flash memory faces the problem of shortened storage time due to too thin gate penetration oxide layer, and excessive operating voltage. shortcoming. Therefore, various forms of non-volatile memory are actively being developed to replace flash memory, among which resistive random access memory (Resistive Random Access Memory, RRAM) achieves storage effect by changing the resistance value, and Utilizing its non-volatile characteristics as a memory element, it has the advantages of low operating voltage, long storage time, multi-state storage, simple structure and small area. [0003] After the resistive memory is manufactured, it wil...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C13/00G11C29/56
Inventor 林孟弘吴伯伦
Owner WINBOND ELECTRONICS CORP
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