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A sorting and error-proofing method and device for multi-layer PCB stacked boards

An error-proof and board-stacking technology, which is applied in multilayer circuit manufacturing, electrical components, printed circuit manufacturing, etc., can solve problems such as difficult products to be found, flow to customers, and core boards that cannot be reused.

Active Publication Date: 2018-04-24
DONGGUAN SHENGYI ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, arranging and stacking multiple core boards in a specified order is done manually. During the stacking process, it is inevitable that there will be errors in the order due to human negligence.
In addition, the existing detection methods in the PCB industry cannot effectively detect the wrong sorting of core boards, making it difficult for problematic products to be found and flow to customers. They are only discovered when customers perform functional tests after mounting / packaging, which will lead to serious production cost loss
[0003] Based on the above situation, it is necessary for us to design an error-proof method to effectively monitor the sorting of the core boards during the stacking process to ensure that the wrongly sorted core boards are found before pressing, and to prevent the core boards from being unable to be reused after pressing. scrapped

Method used

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  • A sorting and error-proofing method and device for multi-layer PCB stacked boards
  • A sorting and error-proofing method and device for multi-layer PCB stacked boards
  • A sorting and error-proofing method and device for multi-layer PCB stacked boards

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Embodiment Construction

[0069] The technical solutions of the present invention are further described below with reference to the accompanying drawings and through specific embodiments.

[0070] In this embodiment, as figure 1 and image 3 As shown, a method for sorting and error prevention of multilayer PCB stacks is provided, which includes the following steps:

[0071] S10, making different error-proofing patterns on the core boards 1 at different levels;

[0072] S20, stacking a piece of the core board 1;

[0073] S30, acquiring the error-proofing pattern on the stacked core boards 1;

[0074] S40, judging whether the obtained error-proofing graphic is consistent with the standard error-proofing graphic of the corresponding level in the control system:

[0075] If not, take out the stacked core boards 1, and return to step S20;

[0076] If yes, go to step S50;

[0077] S50, determine whether the number of layers of the core board 1 is equal to the number of pre-designed PCB layers:

[0078...

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Abstract

The invention discloses a sorting mistake-proofing method for multiple layers of printed circuit board (PCB) lamination. The method comprises the following steps: fabricating different mistake-proofing patterns on different levels of core plates; stacking one core plate; obtaining the mistake-proofing pattern on the stacked core plate; judging whether the obtained mistake-proofing pattern is consistent with the corresponding level of standard mistake-proofing pattern in a control system or not, if so, taking out the stacked core plate, and restacking another core plate; if so, judging whether the number of layers of the core plates is equal to the number of layers of PCBs designed in advance or not, if not, stacking the next core plate; and if so, carrying out riveting. The invention further discloses a sorting mistake-proofing device for multiple layers of printed circuit board (PCB) lamination. The correctness of the mistake-proofing pattern on each core plate is judged in the plate stacking process to ensure that various core plates are stacked according to the specified order; according to the method, a riveting operation can be carried out only when the stacking orders of the core plates are all correct; and the core plate with a wrong stacking order is prevented from being riveted and fixed, so that scrapping and waste of the core plate are avoided.

Description

technical field [0001] The invention relates to the technical field of PCB stacking technology, in particular to a method and device for stacking multi-layer PCBs, and further, to a method and device for preventing errors in ordering of multi-layer PCB stacks. Background technique [0002] The multi-layer PCB is formed by pressing multiple core boards in a specified order through high temperature and high pressure in the pressing process. At present, arranging and stacking a plurality of core boards in a specified order is done by manual operation. In the process of stacking the boards, it is inevitable that there will be an abnormal ordering error due to human negligence. In addition, the existing detection methods in the PCB industry cannot effectively detect core board sorting errors, which makes it difficult to find faulty products and flow to customers, only to be found during functional testing after customer placement / package, which will lead to serious problems. los...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/46
CPCH05K3/4602H05K3/4611H05K2203/167
Inventor 陈仁喜柴绍东黄兵袁树华李光龙杨兴颜金雷邹艳丽许德勤
Owner DONGGUAN SHENGYI ELECTRONICS
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