Packaging method for image sensor chip and packaging structure

Abstract

The invention provides a packaging method for an image sensor chip and a packaging structure. The packaging method comprises the steps as follows: a wafer is provided; the wafer comprises a first surface and a second surface opposite to the first surface, and comprises the image sensor chip which is formed by arranging a plurality of grids; the image sensor chip comprises an image sensor region and a boning pad; the image sensor region and the boning pad are located on the first surface of the wafer; an opening which extends towards the first surface is formed in the second surface of the wafer, and exposes the bonding pad; a V-shaped cutting groove which extends towards the first surface is formed in the second surface of the wafer; a photosensitive ink coats the second surface of the wafer, so that the V-shaped cutting groove is fully filled with the photosensitive ink; the photosensitive ink covers the opening; and a hollow cavity is formed in the opening. The hollow cavity is formed in the opening, so that the condition that a re-wiring layer is separated from the bonding pad is effectively avoided; the packaging yield of the image sensor chip is improved; and the reliability of the packaging structure of the image sensor chip is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a packaging method for wafer-level semiconductor chips. Background technique [0002] Today's mainstream semiconductor chip packaging technology is Wafer Level Chip Size Packaging (WLCSP), which is a technology that packages and tests an entire wafer and then cuts it to obtain a single finished chip. The size of a single finished chip packaged by this packaging technology is almost the same as that of a single grain, which meets the market's increasingly light, small, short, thin and low-cost requirements for microelectronic products. Wafer-level chip-scale packaging technology is a hot spot in the current packaging field and a future development trend. [0003] Please refer to figure 1 , discloses a packaging structure of a wafer-level image sensor chip. A wafer 1 and a protective substrate 2 are aligned and pressed together, and a support unit 3 is located between the ...

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Problems solved by technology

[0007] However, since the solder resist ink 26 fills the opening 22 , in the subsequent reflow soldering and reliability testing, the thermal expansion and contraction of the solder resist ink 26 forms a force acting on the rewiring layer 24 . , the rewiring layer 24 is easily detached from the pad 12, resulting in defects, which has become a technical problem to be solved by those skilled in the art

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