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252results about How to "Improve packaging yield" patented technology

Flat non down-lead encapsulation piece and method for producing the same

The invention discloses a flat non-lead packaging part and a production method thereof. The flat non-lead packaging part comprises a lead frame carrier, wherein the carrier is adhered with an IC chip. The front side of the lead frame carrier is provided with pits. The periphery of the front side of the lead frame carrier is provided with two circles of waterproof grooves. The back side of the lead frame carrier is provided two circles of anti-overflow grooves. The production method comprises the processes of washer thinning and slicing, core loading, press welding, plastic package, plating, printing and cutting and coiling. The method strengthens the bonding forces between the adhesive and the lead frame carrier and the IC chip and eliminates and reduces the rate of a lamination defect generated on the surface of the IC chip. The two circles of waterproof grooves are provided on the periphery of the carrier, the plastic packaging materials are embedded in the grooves so as to prevent moisture from entering the chip. The two circles of anti-overflow grooves arranged on the edge of the carrier have functions of preventing the lamination defect, moisture and material overflow. The method has the advantages of high rate of finished product, good reliability and convenient use, and effectively improves the reliability and excellent packaging rate of products.
Owner:TIANSHUI HUATIAN TECH

Packaging method and packaging structure of piezoelectric acoustic wave device

The invention provides a packaging method of a piezoelectric acoustic wave device. The packaging method comprises the following steps: providing a bare chip, wherein multiple metal ports are arrangedon the surface of the bare chip, and the multiple metal ports are distributed on the outer side of an effective active region of the bare chip; forming a sealing wall surrounding the effective activeregion on the surface of the bare chip; forming conductive convex blocks on the multiple metal ports of the bare chip; providing a base plate, wherein a first welding pad corresponding to the multiplemetal ports of the bare chip is arranged on one surface of the base plate, and a second welding pad is arranged on the other surface of the base plate; electrically connecting the conductive convex blocks of the bare chip with the first welding pad of the base plate through the flip-chip process; and forming a sealing outer shell, covering the bare chip, on the base plate. Correspondingly, the invention further provides a packaging structure of the piezoelectric acoustic wave device. By implementation of the packaging method of the piezoelectric acoustic wave device and the packing structureof the piezoelectric acoustic wave device, the instability of a traditional sealing process is transferred to the surface of the base plate, so that the effective active region of the piezoelectric acoustic wave device is effectively protected.
Owner:SUZHOU HUNTERSUN ELECTRONICS CO LTD

Production method of encapsulated component of copper wire bonding IC chip

InactiveCN101626008ASolving the crater puzzleSaving wire costSemiconductor/solid-state device detailsSolid-state devicesGold ballPlastic packaging
The invention relates to a production method of an encapsulated component of a copper wire bonding IC chip. A welding plate of the IC chip is provided with a golden ball on which copper bonding balls are stacked, an arch wire is provided with a copper welding point on an inner pin of a lead frame, and a welding plate of the IC chip is connected with the pin of the lead frame. A plastic packaging body is covered on the IC chip, the copper balls stacked on the packed golden ball, the copper welding point of the arch wire on the inner pin of the lead frame and partial inner pins of the lead frame to form a whole circuit. The production method comprises wafer grinding, wafer scribing, core installing, press welding, plastic package, post curing, printing, punching separation, inspection, packaging and warehousing. The invention has simple and reasonable structure, easy use and high qualified rate in encapsulation and testing as well as high reliability, avoids craters, the intensity of the welding point is improved, the pull force of copper welding wires and the shearing strength of the welding point through the production method are greater than that in a copper (golden) bonding production method through direct wire threading, and unsoldering can not happen to the inner welding point.
Owner:TIANSHUI HUATIAN TECH

Highlight flip LED chip having insulating protection structure and manufacturing method thereof

The invention discloses a manufacturing method of a highlight flip LED chip having an insulating layer protection structure. The manufacturing method comprises the steps that a luminous structure is provided; the luminous structure is etched; an insulating layer is deposited on the surface of the luminous structure; the insulating layer is etched so that a first hole and a second hole are formed;and a transparent conductive layer, an Ag mirror reflection layer, an Ag mirror protection layer and a DBR reflection layer are formed on the surface of the insulating layer and in the first hole andthe second hole. The insulating layer is formed on the surface or the side edge of the first semiconductor layer, the active layer and the second semiconductor layer so that the insulating layer is enabled to cover the bare part of the luminous structure, the Ag can be prevented from migrating to the bare part of the active layer under the effect of the electric field formed by the first semiconductor layer and the second semiconductor layer and the IR yield rate of the chip can be enhanced. Furthermore, the Ag mirror reflection layer covering the insulating layer can effectively reflect out the light emitted by the side edge of the luminous structure so as to enhance the luminous efficiency of the chip.
Owner:FOSHAN NATIONSTAR SEMICON

Embedded type TSV adapter plate structure for numerous-layer wiring

The invention relates to an adapter plate structure, in particular to an embedded type TSV adapter plate structure for numerous-layer wiring, which belongs to the technical field of integrated circuit packaging. According to the technical scheme provided by the invention, the embedded type TSV adapter plate structure for numerous-layer wiring comprises an adapter plate body, wherein a wiring adapter plate groove is formed in the adapter plate body in a concave manner, a wiring adapter plate is arranged in the wiring adapter plate groove, numerous-layer wires are arranged on the wiring adapter plate, the wiring adapter plate is electrically connected with an adapter plate upper redistribution layer on the upper surface of the adapter plate body by means of the numerous-layer wires, the adapter plate upper redistribution layer is electrically connected with an adapter plate lower redistribution layer on the lower surface of the adapter plate body by means of filling connectors filled in through vias of the adapter plate body, a plurality of solder balls are arranged on the adapter plate lower redistribution layer, and the solder balls are electrically connected with the adapter plate lower redistribution layer. The embedded type TSV adapter plate structure can effectively increase the number of wiring layers, realizes the high-density chip scale packaging and system packaging, and is safe and reliable.
Owner:58TH RES INST OF CETC

Ultra-narrow-pitch wafer level encapsulation cutting method

The invention discloses an ultra-narrow-pitch wafer level encapsulation cutting method. According to the method, a layer of photoresist is paved at the front side of a wafer, a first opening is formed through an exposure and development process, and a dielectric layer corresponding to a cutting path is exposed; then, a second opening is formed through an etching process or a laser cutting process, so that the second opening penetrates into a substrate at a certain depth; then, the grinding is carried out from the back surface, so that the stress is totally concentrated in a sharp corner position of the second opening formed through etching or cutting, and certain cracks are generated; if the extension resistance generated in the grinding process is great enough, the cracks can crack along a certain angle, and the wafer is further divided into single chips; if the extension resistance generated in the grinding process is not great enough, certain external force is exerted on a wafer, so that the cracks expand, and the water is further divided into the single chips. The ultra-narrow-pitch wafer level encapsulation cutting method has the advantages that the cutting of the wafer with the ultra-narrow cutting passage can be realized, in addition, the technological process is simple, and the process window is also correspondingly increased.
Owner:HUATIAN TECH KUNSHAN ELECTRONICS

Display panel, display device and manufacturing method of display panel

The invention discloses a display panel, a display device and a manufacturing method of the display panel. The display panel comprises a substrate, and the substrate comprises a display area, an opening area and an isolation area located between the display area and the opening area. The isolation area is internally provided with at least one isolation column, each isolation column is arranged around the hole area for a circle, and in the direction parallel to the substrate, each isolation column comprises a first part and a second part which are opposite and connected. The side face, facing the second part, of the first part and the side face, back on to the first part, of the second part are respectively provided with the grooves in a concave manner, and light-emitting layers are arranged in the display area and the isolation area and are disconnected at the grooves. Moreover, the light-emitting layer is of a continuous structure at the side, opposite to the second part, of the firstpart and the side, facing the first part, of the second part. According to the display panel provided by the invention, the packaging yield of the display panel can be effectively improved, and the effectiveness of the isolation column for cutting off a water-oxygen invasion channel is ensured.
Owner:BOE TECH GRP CO LTD +1

Single-fiber bidirectional component and packaging method thereof

InactiveCN102508343ACoupling does not affectImprove packaging yieldCoupling light guidesCouplingOptical power
A single-fiber bidirectional component comprises a substrate, a tube core sleeve, a receiver, an adapter, a laser device and an optical filter. The laser device is connected with the tube core sleeve, the optical filter is arranged in the substrate, a first connecting hole and a second connecting hole which are coaxial are arranged on the substrate, the tube core sleeve is inserted into the first connecting hole, the inner diameter of the first connecting hole is larger than the outer diameter of the tube core sleeve, and the adapter is inserted into the second connecting hole. Light emitted from the laser device is coupled by the optical filter and enters the adapter, and light entering the adapter is reflected by the optical filter and further enters the receiver. In a packaging process of the single-fiber bidirectional component, coupling adjustment is carried out at first so as to obtain proper optical power, and then packaging is carried out. During coupling adjustment, the laser device can be longitudinally adjusted while the adapter is transversely adjusted due to the fact that the inner diameter of the first connecting hole is larger than the outer diameter of the tube core sleeve, the adapter does not need to be longitudinally adjusted, coupling of a receiving end is unaffected, receiving coupling can be realized easily, and packaging yield is high.
Owner:SHENZHEN GIGALIGHT TECH

Coupled system of optical device and coupled method of optical device

The present invention is suitable for the technical field of optical device package, and provides a coupled system of an optical device and a coupled method of an optical device. The system comprisesa six-axis coupled device, a three-dimensional mobile device, a current detection device and a camera monitoring device. The six-axis coupled device is configured to drive a PD array to move and perform coupling of an arrayed waveguide grating, and the camera monitoring device is configured to perform monitoring of a relative position and a relative distance between the PD array and the arrayed waveguide grating in the coupled process. The coupled system of the optical device and the coupled method of the optical device are provided with the camera monitoring device to perform shooting and monitoring of the relative position and the relative distance between the PD array and the arrayed waveguide grating to avoid the problem that the PD array and the arrayed waveguide grating are collideddue to manual determination faults when a distance between the PD array and the arrayed waveguide grating is too small and prevent the PD array and the arrayed waveguide grating from being extruded and damaged compared to a mode of eye observation of operators so as to improve the coupled efficiency between the PD array and the arrayed waveguide grating on this basis and improve the package yield.
Owner:APAT OPTOELECTRONICS COMPONENTS

Manufacturing method of LED (light-emitting diode) chip with inverted structure

The invention relates to a manufacturing method of an LED (light-emitting diode) chip with an inverted structure. The LED chip comprises an N-type electrode formation region and a P-type electrode formation region, wherein the N-type electrode formation region comprises a substrate, a buffer layer, an N-type layer, an N-type respective limiting layer, an active region layer, a P-type respective limiting layer, a P-type layer, a P-type ohmic contact layer, a light reflecting layer and an insulating film; one end face of an N-type electrode passes through the insulating film so as to be connected with the light reflecting layer, and the other end face of the N-type electrode is connected with a heating panel through a PCB (printed circuit board); the P-type electrode formation region comprise a substrate, a buffer layer, an N-type layer and the insulating film, one end of a P-type electrode passes through the insulating film so as to be connected with the N-type layer, and the other end of the P-type electrode is connected with the heating panel by virtue of the PCB; and the two end faces, respectively connected with the PCB, of the N-type electrode and the P-type electrode are positioned at a same horizontal plane. The manufacturing method provided by the invention has the advantages that the N-type electrode and P-type electrode of the LED chip are manufactured in the same surface, the package yield of a chip inversion process is increased, thereby avoiding the occurrence of the electrode rosin joint or sealed-off state.
Owner:祝进田

Packaging method for image sensor chip and packaging structure

The invention provides a packaging method for an image sensor chip and a packaging structure. The packaging method comprises the steps as follows: a wafer is provided; the wafer comprises a first surface and a second surface opposite to the first surface, and comprises the image sensor chip which is formed by arranging a plurality of grids; the image sensor chip comprises an image sensor region and a boning pad; the image sensor region and the boning pad are located on the first surface of the wafer; an opening which extends towards the first surface is formed in the second surface of the wafer, and exposes the bonding pad; a V-shaped cutting groove which extends towards the first surface is formed in the second surface of the wafer; a photosensitive ink coats the second surface of the wafer, so that the V-shaped cutting groove is fully filled with the photosensitive ink; the photosensitive ink covers the opening; and a hollow cavity is formed in the opening. The hollow cavity is formed in the opening, so that the condition that a re-wiring layer is separated from the bonding pad is effectively avoided; the packaging yield of the image sensor chip is improved; and the reliability of the packaging structure of the image sensor chip is improved.
Owner:CHINA WAFER LEVEL CSP
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