69results about How to "Improved ohmic contact characteristics" patented technology

In the nitride semiconductor device using the silicon substrate, the metal electrode formed on the silicon substrate has both ohmic contact property and adhesion, so that the nitride semiconductor device having excellent electric properties and reliability is obtained. The nitride semiconductor device includes a silicon substrate (2), a nitride semiconductor layer (10) formed on the silicon substrate (2), and metal electrodes (8, 8′) formed in contact with the silicon substrate (2). The metal electrodes (8, 8′) has first metal layers (4, 4′) which are formed in a shape of discrete islands and in contact with the silicon substrate (2), and second metal layers (6, 6′) which are in contact with the silicon substrate (2) exposed among the islands of the first metal layers (4, 4′) and are formed to cover the first metal layers (4, 4′). Further, the second metal layers (6, 6′) are made of a metal capable of forming ohmic contact with silicon, and the first metal layers (4, 4′) are made of an alloy containing a metal and silicon, in which the metal is different than that in the second metal layer (6,6′).

An emitter structure of a crystal silicon heterojunction solar battery is formed by an amorphous silicon film (a-Si:H) with double-layer gradient doping concentration. A composite structure of a heavily-doped p-a-Si:H layer/lightly-doped p-a-Si:H layer or a heavily-doped n-a-Si:H layer/lightly-doped n-a-Si:H layer serves as the emitter of the crystal silicon heterojunction solar battery adopting the a-Si:H/c-Si structure; the heavily-doped layer is connected with a conducting layer; the lightly-doped layer is connected with an intrinsic a-Si:H layer on the surface of crystalline silicon; when the crystalline silicon is n-type, the emitter adopts the heavily-doped p-a-Si:H layer/slightly-doped p-a-Si:H layer structure; and when the crystalline silicon is p-type, the emitter is the heavily-doped n-a-Si:H/slightly-doped n-a-Si:H layer. By adopting the double-layer structure, the open-circuit voltage and short-circuit current of the crystal silicon solar battery can be improved, contact barrier between the amorphous silicon layer and the conducting layer is reduced and the conversion efficiency of the solar battery is improved.

The invention discloses an LED (Light Emitting Diode) chip for a composite transparent conducting electrode. The LED chip comprises a gallium nitride buffer layer, an N-GaN layer, a quantum well layer, a P-GaN layer and a composite transparent electrode layer which grow on a substrate in sequence. The LED chip is characterized in that an n-type electrode is manufactured on the N-GaN layer; a p-type electrode is manufactured on a graphene layer of the composite transparent electrode layer; the composite transparent electrode layer is formed by compounding a graphene laminar film and ZnO nanorods growing on the graphene laminar film. The invention also discloses a manufacturing method of the chip. The graphene laminar film/ZnO nanorod compounded transparent electrode layer formed by the manufacturing method has the advantages of capability of preventing cracking and good light transmittance performance and is easy to process, so that the contact performance, the current expansion performance and the transmissivity of the chip are greatly improved, and the production cost of the subsequent chip technology can be greatly reduced.

Provided are a flip-chip nitride-based light emitting device having an n-type clad layer, an active layer and a p-type clad layer sequentially stacked thereon, comprising a reflective layer formed on the p-type clad layer and at least one transparent conductive thin film layer made up of transparent conductive materials capable of inhibiting diffusion of materials constituting the reflective layer, interposed between the p-type clad layer and reflective layer; and a process for preparing the same. In accordance with the flip-chip nitride-based light emitting device of the present invention and a process for preparing the same, there are provided advantages such as improved ohmic contact properties with the p-type clad layer, leading to increased wire bonding efficiency and yield upon packaging the light emitting device, capability to improve luminous efficiency and life span of the device due to low specific contact resistance and excellent current-voltage properties.

Provided are a top-emitting nitride-based light emitting device having an n-type clad layer, an active layer and a p-type clad layer sequentially stacked thereon, comprising an interface modification layer formed on the p-type clad layer and a transparent conductive thin film layer made up of a transparent conductive material formed on the interface modification layer; and a process for preparing the same. In accordance with the top-emitting nitride-based light emitting device of the present invention and a process for preparing the same, there are provided advantages such as improved ohmic contact with the p-type clad layer, leading to increased wire bonding efficiency and yield upon packaging the light emitting device, capability to improve luminous efficiency and life span of the device due to low specific contact resistance and excellent current- voltage properties.

The invention discloses a GaN device with the mixed polarity. The GaN device relates to the technical field of field effect transistors with two-dimensional carrier gas channels. The GaN device comprises a substrate layer, an N-polar GaN buffer layer, a first N-polar Alx GaN layer with a gradually increased Al component x, a second N-polar AlxGaN layer with a constant Al component x, a third N-polar AlxGaN layer with a gradually reduced Al component x, and a Ga-polar GaN channel layer. By virtue of the structure, a GaN based material with higher quality can grow epitaxially and the surface density and migration rate of 2DEG in a channel can be increased; and meanwhile a device with smaller ohmic contact resistance can be fabricated on a material with the mixed polarity by adopting a conventional Ga-polar GaN based device fabrication process.

Provided is an epitaxial substrate capable of achieving a semiconductor device that has excellent ohmic contact characteristics as well as satisfactory device characteristics. On a base substrate, a channel layer formed of a first group III nitride that contains at least Al and Ga and has a composition of In_x1Al_y1Ga_z1N (x1+y1+z1=1) is formed. On the channel layer, a barrier layer formed of a second group III nitride that contains at least In and Al and has a composition of In_x2Al_y2Ga_z2N (x2+y2+z2=1) is formed such that an In composition ratio of a near-surface portion is larger than an In composition ratio of a portion other than the near-surface portion.

A manufacturing method of a photoelectronic device comprises the following steps: forming a photoelectric component on a substrate; forming a reflecting ohmic contact film on the photoelectric component and forming a second conducting layer on the reflecting ohmic contact film; wherein, the reflecting ohmic contact film is provided with a pattern dielectric layer and a first conducting layer; the pattern dielectric layer and the first conducting layer are deposited above the photoelectric component. The invention also discloses the photoelectronic device manufactured by the method.

The invention relates to an anti-LID black silicon solar high-efficiency cell and a production method thereof. The anti-LID black silicon solar high-efficiency cell comprises a positive electrode, a negative electrode, an aluminum back surface field, a P-type silicon wafer substrate, and a PN junction, an SiO2 oxide film and an SiNx film located on the P-type silicon wafer substrate sequentially, wherein the thickness of the PN junction is uniform; and the SiNx film coats the surface of the SiO2 oxide film. Through high-light trapping nano column making, first-time diffusion, edge and phosphosilicate glass removal, second-time diffusion, SiNx surface passivation, anti-reflection film deposition, and cell negative electrode and positive electrode and aluminum back surface field making sequentially, the anti-LID black silicon solar cell is made. Thus, the light energy absorption is enhanced, the photoelectric conversion efficiency is improved, the leakage phenomenon of the cell is reduced, and the anti-LID and PID effects are realized.

The present disclosure relates to set of a ohmic contact electrodes on both P-type and N-type layers of a GaN-based light emitting diode (LED) and a fabricating method thereof. The materials of ohmic contact electrodes on both P-type and N-type layers of a GaN-based LED are a metal combination of Cr/Pd/Au. In one embodiment, the fabricating method comprises etching out an N-type GaN layer on an epitaxial structure on a sapphire substrate, and evaporating a P-type transparent electrode layer on the P-type GaN layer, then positioning patterns of the ohmic contact electrodes on both P-type and N-type layers, and then evaporating a metal combination of a Cr layer 50 Å to 500 Å thick, a Pd layer 300 Å to 1000 Å thick and an Au layer 3000 Å to 20000 Å thick in turn on the P-type transparent electrode layer and N-type GaN layer respectively, and then annealing electrodes of the chip, on which the Cr, Pd and Au layers are evaporated in nitrogen atmosphere for 5 minutes to 20 minutes at a temperature from 200 degrees to 450 degrees. Excellent ohmic contact characteristics and better thermal stability are obtained as well as higher oxidation resistance, thus improving the reliability of diode.

The invention provides a preparation method of a P electrode of a light-emitting diode chip with a vertical structure, and belongs to the field of light-emitting diodes. The method comprises the steps of providing a light-emitting diode epitaxial wafer, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron barrier layer, a P-type GaN layer and a P-type ohmic contact layer which are stacked on the substrate in sequence, wherein a contact layer electrode is grown on the P-type ohmic contact layer, thermal annealing treatment is conducted on the contact layer electrode, and the contact layer electrode comprises a Ni layer; and a first reflecting layer electrode is grown on the contact layer electrode, thermal annealing treatment is conducted on the first reflecting layer electrode, the first reflecting layer electrode comprises a first Ag layer, the annealing time of the first reflecting layer electrode is shorter than that of the contact layer electrode, and the annealing temperature of the first reflecting layer electrode is lower than that of the contact layer electrode. According to the invention, the P electrode with high reflectivity and low contact resistivity can be obtained.

A semiconductor light emitting device includes a first semiconductor layer, an active layer disposed on the first semiconductor layer to emit ultraviolet light, a second semiconductor layer disposed on the active layer, and a first electrode disposed on the first semiconductor layer and being in Ohmic contact with a portion of the first semiconductor layer, the first electrode including a contact electrode including aluminum (Al) and at least one other material and having a first region adjacent to the first semiconductor layer and a second region, with each region having an Al composition ratio defined by the amount of Al relative to the amount of the at least one other material, wherein the Al composition ratio of the first region is greater than the Al composition ratio of the second region, and a metal layer disposed on the contact electrode.

The invention belongs to the field of PiN devices, and particularly relates to a silicon carbide PiN device ohmic contact method. The method comprises the following steps that a) a silicon carbide PiN base body is prepared; b) an amorphous silicon layer is deposited on the surface of the P-type SiC epitaxial layer of the silicon carbide PiN base body; c) a metal layer is respectively deposited on the surface, on which the amorphous silicon layer is deposited, of the SiC substrate of the silicon carbide PiN base body and the surface of the amorphous silicon layer; and d) annealing processing is performed on the silicon carbide PiN base body on which the metal layer is deposited so that a silicon carbide PiN device with formation of ohmic contact is obtained, wherein annealing processing includes a first temperature rising period, a first heat preservation period, a second temperature rising period and a second heat preservation period, and temperature of the first heat preservation period and the second heat preservation period is respectively 450-550 DEG C and 970-1020 DEG C. According to the method, P-type ohmic contact and N-type ohmic contact can be formed on the silicon carbide PiN base body on which the metal layer is deposited through one time of annealing process.