201results about How to "Prevent interdiffusion" patented technology

Disclosed are a thin film transistor substrate where barrier metal can be omitted to be formed between a semiconductor layer of a thin film transistor and source and drain electrodes (barrier metal need not be formed between the semiconductor layer of the thin film transistor and the source and drain electrodes), and a display device. (1) A thin film transistor substrate has a semiconductor layer of a thin film transistor, a source electrode, a drain electrode, and a transparent conductive film, wherein the substrate has a structure in which the source and drain electrodes are directly connected to the semiconductor layer of the thin film transistor, and the source and drain electrodes include an Al alloy thin film containing Ni of 0.1 to 6.0 atomic percent, La of 0.1 to 1.0 atomic percent, and Si of 0.1 to 1.5 atomic percent. (2) A display device has the thin film transistor substrate.

Gate electrodes made of polysilicon film are isolated and face each other by way of a side wall spacer portion that fills a gap formed above an isolation insulating film at the boundary of NMIS region and PMIS region. A first metal film is formed on one of the gate electrodes, and an inhomogeneous second metal film is formed on the other of the gate electrodes. The both gate electrodes become inhomogeneous metal silicide gates through the promotion of silicide reaction by heat treatment. The mutual diffusion of metal atoms from the metal film to the gate electrode is suppressed by the interposition of the side wall spacer portion being an insulating film.

A multilayer ceramic electronic component includes a ceramic body including a plurality of ceramic layers, the ceramic body having a first main surface and a second main surface and a plurality of side surfaces that connect the first main surface to the second main surface, an internal conductor including nickel, the internal conductor being disposed in the ceramic body and having an exposed portion exposed at least one of the side surfaces, and an external terminal electrode disposed on at least one of the side surfaces of the ceramic body, the external terminal electrode being electrically connected to the internal conductor. The external terminal electrode includes a first conductive layer including a Sn—Cu—Ni intermetallic compound, the first conductive layer covering the exposed portion of the internal conductor at least one of the side surfaces of the ceramic body.

A transparent conductive structure includes a substrate unit, a first coating unit, a diffusion barrier structure, a second coating unit, a third coating unit and a conductive unit. The substrate unit includes a plastic substrate. The first coating unit includes a first coating layer formed on the plastic substrate. The diffusion barrier structure is formed on the first coating layer. The diffusion barrier structure includes a first oxide unit having a plurality of first oxide layers and a second oxide unit having a plurality of second oxide layers. The first oxide layers and the second oxide layers are stacked on top of each other alternately. The second coating unit includes a second coating layer formed on the diffusion barrier structure. The third coating unit includes a third coating layer formed on the second coating layer. The conductive unit includes a transparent conductive film formed on the third coating layer.

A light-emitting diode has a low-resistivity silicon substrate on which there are laminated a buffer layer, an n-type lower confining layer, an active layer of multiple quantum well configuration, and a p-type upper confining layer. The active layer is constituted of cyclic alternations of a barrier sublayer of InGaN, a first complementary sublayer of AlGaInN, a well sublayer of InGaN, and a second complementary sublayer of AlGaInN. The proportions of the noted ingredients of the active sublayers are all specified. The first and the second complementary sublayers prevent the evaporation or diffusion of indium from the neighboring sublayers.

A complementary metal-oxide-semiconductor (CMOS) integrated circuit structure, and method of fabricating the same according to a replacement metal gate process. P-channel and n-channel MOS transistors are formed with high-k gate dielectric material that differ from one another in composition or thickness, and with interface dielectric material that differ from one another in composition or thickness. The described replacement gate process enables construction so that neither of the p-channel or n-channel transistor gate structures includes the metal gate material from the other transistor, thus facilitating reliable filling of the gate structures with fill metal.

A semiconductor light emitting device comprises: a light-emitting portion formed on a semiconductor substrate, an As-based p-type contact layer formed thereon, a current spreading layer formed thereon of a metal oxide material, and a buffer layer formed between the p-type cladding layer and the p-type contact layer. The buffer layer has a group III/V semiconductor with a p-type conductivity and hydrogen or carbon included intentionally or unavoidably therein, and the buffer layer has a thickness equal to or greater than a diffusion length L of a dopant doped into the p-type contact layer.

The invention provides a positive electrode material with low internal resistance and particularly relates to a positive electrode material with low internal resistance for a solid state lithium battery and a preparation method of the positive electrode material. The positive electrode material with low internal resistance is prepared from a positive electrode active material core and a surface composite material layer covering the positive electrode active material core, wherein the surface composite material layer is mainly prepared from a nano long-range conducting material and a single ionconductor polymer material. The positive electrode material with low internal resistance, provided by the invention, has higher electronic conductivity and lithium ion conductivity and can effectively reduce the internal resistance of the solid state lithium battery; because the positive electrode active material core and the surface composite material layer have strong interaction, the phenomenaof granule cracking and grinding caused by volume deformation of the positive electrode active material core in repeated charging and discharging process can be effectively inhibited so as to ensurethe structural integrity of the positive electrode active material core and good interface stability; and furthermore, the technical scheme provided by the invention is simple and easy, low in production cost and suitable for performing large-scale production.

A light emitting element including: a semiconductor layer stack including a light emitting layer; a metal optical reflection film which is formed on the surface of the semiconductor layer stack opposite to the surface from which light emitted from the light emitting layer is taken out of the semiconductor layer stack to reflect the emitted light; a metal cover film which is formed above the metal optical reflection film to prevent the metal optical reflection film from coming off; and a metal anti-diffusion film which is formed between the metal optical reflection film and the metal cover film to prevent interdiffusion between the metal optical reflection film and the metal cover film. The metal anti-diffusion film is a single layer film made of any one of tungsten, rhenium and tantalum or a layered film made of two or more of tungsten, rhenium and tantalum.

The invention relates to a solid-state battery and a preparation method therefor. The preparation method for the solid-state battery comprises the steps of preparing a stacking structure, wherein the stacking structure at least comprises a positive electrode layer and a solid-state electrolyte layer arranged on the positive electrode layer; the positive electrode layer comprises positive electrode active material granules and solid-state electrolyte granules; and performing quick interface heating on the stacking structure to enable the interface of at least one kind of the positive electrode active material granules and the solid-state electrolyte granules in the positive electrode layer to be fused to generate an interface fused phase, so as to directly connect the positive electrode active material granules and the solid-state electrolyte granules.

The invention discloses a dissimilar material composite welding method. The dissimilar material composite welding method comprises the following steps: firstly, a welding device is obtained; secondly, a to-be-welded part a and a to-be-welded part c which are each made of dissimilar materials and wholly in a columnar shape are obtained, and the dissimilar material composite welding method is characterized in that the welding device in the first step further comprises a heater; thirdly, a middle transition layer and a top pressure bar are obtained; fourthly, the middle transition layer and the to-be-welded part a are in diffusion welding; fifthly, friction pre-welding clamping is carried out; sixthly, friction pre-welding preheating is carried out; seventhly, inertia friction welding connection of a material with the middle transition layer is carried out; and eighthly, after-welding treatment is carried out. The dissimilar material composite welding method has the beneficial effects of being higher in welding efficiency and better in welding quality.

A “three” chamber design multi-chamber cluster processing system which is used in the fabrication of a solar cell-comprising substrate. The processing system includes at least one PECVD processing chamber configured to deposit a p-doped layer, at least three PECVD processing chambers configured to deposit an i-layer, and at least one PECVD processing chamber configured to deposit an n-doped layer. The processing system also includes at least one central substrate transferring chamber which is typically located substantially equidistant from each of the PECVD processing chambers, and a transfer robot present in the central transferring chamber which is capable of paired transfer of substrates. An apparatus which provides a source of fluorine-comprising reactive species is in communication with each of said PECVD processing chambers.

The invention provides a high-toughness anticorrosion CrAlN/Cr2AlC multilayer coating and a preparation method thereof. The preparation method comprises the steps that a matrix is cleaned and dried, etching is conducted on the matrix with argon ions, a transition layer is deposited on the matrix, the CrAlN/Cr-Al-C multilayer film coating is deposited on the surface of the matrix, and low temperature annealing is conducted to obtain CrAlN/Cr2AlC. The transition layer is arranged between the matrix and the CrAlN/Cr2AlC multilayer coating, and according to the multilayer coating, CrAlN hard filmsand Cr2AlC MAX phase films are alternately stacked to form periodic arrangement. The multilayer film coating has high hardness, low internal stress and the high anticorrosion characteristic, and abrasion resistant and anticorrosion lives of the matrix can be prolonged. The problems that a single CrAlN coating is high in hardness but insufficient in toughness, and a single Cr2AlC coating is good in toughness and corrosion resistance but low in hardness are solved. According to the provided preparation method of the multilayer film coating, the multilayer film coating is obtained through the combination of periodic control over the flow of N2 and CH4 reaction gases, with subsequent low temperature heat treatment, the process is simple and easy to control, industrialized production can be achieved, and the prepared multilayer film coating is stable in performance and is suitable for abrasion-resistant anticorrosion protection of tool molds or other moving parts in different environments.

The semiconductor device has a backside electrode disposed on a backside of the semiconductor substrate and including multiple layers of metal. The backside electrode includes, on the semiconductor substrate, a first layer of aluminum, a second layer of barrier metal, a third layer of nickel, a fourth layer of silver and a fifth layer of gold which are disposed in this order.

The high temperature alloy protecting technology includes the first forming binding layer in the same components as the substrate on the surface of the high temperature alloy substrate and the subsequent baking composite oxide coating on the surface. The composite oxide coating consists of basic enamel material and added Al2O3 or MgO in 10-40 wt% and Y2O3 in 1-5 wt%; and the basic enamel material consists of ZrO2 3-6 wt%, Al2O3 3-6 wt%, ZnO 8-12 wt%, CaO 3-6 wt%, B2O3 3-6 wt%, Na2O 3-6 wt%, K2O 5-8 wt%, TiO2 1-4 wt% and SiO2 for the rest. The present invention raises the high temperature oxidation resistance and heat corrosion resistance of the substrate and raise the stripping-off resistance of the coating and avoids the mutual diffusion between elements.

Disclosed is an electronic device comprising a substrate, a bump formed on a substrate surface and composed of a first metal material, a junction film for connection with an electrical connecting portion of another device which is formed on the top face of the bump and composed of a second metal material, the melting point of which second metal material itself is lower than the melting point of an alloy thereof with the first metal material, and a diffusion-preventing film which is so arranged between the top face of the bump and the junction film as to cover at least a part of the top face of the bump and composed of a third metal material whose diffusion coefficient in the first metal material is lower than that of the second metal material.

A coating system for reducing the tendency for hydrocarbon fluids, such as fuels and oils, to form carbonaceous deposits that adhere to fluid containment surfaces. The coating system combines an outermost layer of platinum with an inner ceramic barrier layer of silica and/or tantala. The platinum layer catalyzes the hydrocarbon fluid to form particles of carbonaceous gum substances, and the ceramic barrier layer seals the containment surface from the hydrocarbon fluid to eliminate attachments points for deposits and inhibit interdiffusion between the platinum layer and the containment surface. The invention also encompasses a coating apparatus and process for depositing the coating system.

The nanometer crystalline compound coating includes one inner MCrAlY layer, with M being mixture of Ni and/or Co, and one outer nanometer crystalline layer of Al, Cr, Y and other material in certain weight proportion. The preparation process of the nanometer crystalline compound coating includes the first preparation of the MCrAlY layer on the surface of the substrate, and the subsequent preparation of the nanometer crystalline layer on the surface of the MCrAlY layer. The present invention has low preparation cost and simple preparation process, and the nanometer crystalline compound coating has excellent heat resisting and anticorrosive performance and long service life.

The invention belongs to the technical field of a semiconductor and particularly relates to a high-mobility MOS (Metal Oxide Semiconductor) capacitor and a manufacturing method thereof. The MOS capacitor structure is in sequence provided with a mobility substrate, a trimethyl aluminum purification layer, an HfO2 grid medium layer and an electrode. The manufacturing method for the high-mobility MOS capacitor comprises the following steps of: washing the high-mobility substrate; forming the trimethyl aluminum purification layer on the surface of the substrate; depositing the HfO2 grid medium by ALD; and making the electrode. The trimethyl aluminum purification layer can reduce residual oxide content on the surface of the substrate to reduce interfacial state density with the grid medium material so as to improve interface properties. The deposited HfO2 medium layer has accurate controllability of film thickness, excellent conformality, good interface control capability and wonderful large area uniformity, so that electric properties of the MOS capacitor are greatly improved, thereby improving the performance of the MOS transistor.