Regression test case maintenance method and system for ultra-large-scale chip verification

Abstract

The present application provides a method for maintaining regression test cases for verifying an ultra-large scale chip. The method comprises: determining a coverage rate target corresponding to a function of a target ultra-large scale chip; constructing a test incentive group according to the coverage rate target; performing verification by using the test incentive group, collecting statistics on a coverage rate, and storing the test incentive group in a test case set; determining whether the statistically obtained coverage rate reaches the coverage rate target, if yes, determining whether a regression test is required, and if yes, optimizing the test case set and removing a redundant test case; and performing verification by using the optimized test case set, and collecting statistics on and storing the optimized coverage rate. According to the method and system provided by the present application, optimization processing is performed on the test case set based on a coverage rate method, and then verification is performed by using the optimized test case set, thereby increasing the efficiency of the regression test, and ensuring the effectiveness of the regression test while saving resources and time of storing incentive and operating simulation.

Description

technical field [0001] The present application relates to the field of chip design, in particular to a method and system for maintaining regression test cases for ultra-large-scale chip verification. Background technique [0002] With the development of technology, people pay more and more attention to the method of regression test case maintenance for ultra-large-scale chip verification. [0003] Traditional regression test cases directly apply most of the test cases in the previous round of testing. This method is more suitable for small-scale verification and verification of relatively stable designs, but in ultra-large-scale chip verification, a large number of redundant The remaining test cases will cause a great waste of resources and time for saving and regression testing. [0004] Therefore, how to effectively realize the verification of ultra-large-scale chips, improve verification efficiency, and save resources and time is a technical problem to be solved by those...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved in this application is to provide a method and system for maintaining regression test cases for ultra-large-scale chip verification, which solves the problem of a large number of redundancy in the verification of ultra-large-scale chips using traditional regression test cases in the prior art. Test cases will cause a huge waste of resources and time for saving and regression testing

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