A phase-locked loop circuit for suppressing strays and its stray suppression method

Abstract

The invention discloses a phase-locked loop circuit for suppressing strays and a stray suppression method thereof, comprising a main loop of the phase-locked loop and a stray suppression circuit, and the main loop of the phase-locked loop includes sequentially connected frequency and phase detectors device, charge pump, loop filter, voltage controlled oscillator and N frequency divider, the output of the N frequency divider is connected to the input of the frequency and phase detector, and the spurious suppression circuit includes the phase measurement circuit and the charge pump mismatch The current callback circuit, the input of the phase measurement circuit is connected with the output of the frequency and phase detector, the output of the phase measurement circuit is connected with the input of the charge pump mismatch current callback circuit, and the input of the charge pump mismatch current callback circuit is also connected with the discrimination The output of the frequency phase detector is connected, and the output of the mismatch current callback circuit of the charge pump is connected with the charge pump. The invention adds a phase measurement circuit and a mismatch current callback circuit of a charge pump to a traditional phase-locked loop circuit, accurately detects the mismatch current of the charge pump and performs accurate recharging, and greatly reduces the output stray of the phase-locked loop.

Description

technical field [0001] The invention relates to the technical field of phase-locked loops, in particular to a phase-locked loop circuit for suppressing spurs and a stray suppression method thereof. Background technique [0002] In the electronic system, the phase-locked loop is one of the most commonly used circuits. The phase-locked loop locks the output frequency of the voltage-controlled oscillator VCO at the required frequency point by comparing with the reference signal, which is flexible and convenient for other electronic systems. The module provides the required high-performance clock. With the continuous improvement of the integrated circuit performance, the electronic system has higher and higher requirements for the high-frequency clock generated by the phase-locked loop. [0003] Although the traditional phase-locked loop can generate accurate clock signals, due to the different electrical parameters of the NMOS tube and the PMOS tube, the follow-up ability of th...

AI Technical Summary

Problems solved by technology

[0003] Although the traditional phase-locked loop can generate accurate clock signals, due to the different electrical parameters of the NMOS tube and the PMOS tube, the follow-up ability of the charge pump amplifier is limited, and other reasons such as power supply ripple and reference clock feedthrough will cause a cycle time The sum of charge and discharge of the charge pump in the segment to the frequency control line of the voltage-controlled oscillator is not zero, resulting in periodic fluctuations in the control voltage of the voltage-controlled oscillator, resulting in phase detection spurious

Images