Method for Reducing Edge Positioning Error of Optical Proximity Correction
A technology for optical proximity correction and positioning error, which is applied in optics, originals for opto-mechanical processing, and photoengraving of patterned surfaces. and other problems to achieve the effect of improving OPC quality, reducing time, and improving process margins
Active Publication Date: 2019-10-25
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology
[0008] On the other hand, as the size of the semiconductor processing technology gradually decreases, the design interval between graphics decreases rapidly, so that the OPC modification freedom of the 32nm and below nodes is severely restricted by the mask design rules
In this case, it is very easy to cause deterioration of OPC correction accuracy and increase of edge positioning error
[0009] However, as chips become larger and more complex, there will be thousands of EPE errors
Therefore, manual debugging is unlikely to be an appropriate solution
Method used
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[0046] Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same numbers will be used throughout the drawings to refer to the same or like parts. In addition, although the terms used in the present invention are selected from well-known and commonly used terms, some terms mentioned in the description of the present invention may be selected by the applicant according to his or her judgment, and the detailed meanings thereof are set forth herein described in the relevant section of the description. Furthermore, it is required that the present invention be understood not only by the actual terms used, but also by the meaning implied by each term.
[0047] first
[0048] Figure 1a The actual design style is shown. The pattern contains two conta...
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The invention provides a method for reducing the edge positioning error of optical proximity correction. The method comprises the following steps: 1, optically simulating a mask plate figure; 2, parsing the contour of a contact; 3, calculating the edge positioning error of the counter; 4, judging whether the edge positioning error of the counter reaches a preset contour target range or not; 5, 1) examining the internal and / or external key dimensions of each of multiple side edges of the counter touches the limit of a mask plate design rule if the edge positioning error of the contour exceeds the contour target range, 2) moving the side edge if the dimension does not touch the limit and cutting off the corner of the side edge if the dimension touches the limit, and 3, replacing the mask plate figure in step 1 by a mask plate figure obtained in step 2, and afresh performing the method; and 5, completing the optical proximity correction of the mask plate figure if the edge positioning error of the contour reaches the contour target range.
Description
technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for reducing edge positioning errors of optical proximity correction. Background technique [0002] In the semiconductor manufacturing process, the photolithography process plays a central role and is the most important process step in the production of integrated circuits. In order to overcome a series of optical proximity effects (Optical Proximity Effect, OPE) caused by the reduction of the critical dimension (CD), the industry has adopted many resolution enhancement technologies (ResolutionEnhancement Technology, RET), including optical proximity correction ( Optical Proximity Correction, OPC), Phase Shifting Mask (Phase Shifting Mask, PSM) and other technologies. [0003] Optical proximity correction is mainly to compare the simulated graphics to be exposed with the target graphics, establish the correction mode of the graphics to be exposed, and then use...
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IPC IPC(8): G03F1/36
Inventor 张婉娟
Owner SEMICON MFG INT (SHANGHAI) CORP