Formation method of semiconductor device

Abstract

Provided is a formation method of a semiconductor device. The formation method includes: a substrate with is provided, grid electrode structures are formed on the surface of the substrate, a semiconductor material layer is formed on the surface of the top of each grid electrode structure, and sidewalls of the grid electrode structure are aligned with sidewalls of the semiconductor material layer; an interlayer dielectric layer is formed on the surface of the substrate; the interlayer dielectric layer with certain thickness is removed via etching, and surfaces of the sidewalls of the semiconductor material layer are exposed; oxidation treatment of the surfaces of the sidewalls of the semiconductor material layer is performed, and the semiconductor material layer with certain width is converted to a sacrificial layer; the sacrificial layer is removed; a metal layer is formed on the surface of the top and the surfaces of the sidewalls of the remaining semiconductor material layer; and annealing treatment of the metal layer is performed, the metal layer reacts with the remaining semiconductor material layer, and a metal contact layer is formed on the surface of the top of each grid electrode structure. According to the formation method, the metal contact layers are additionally provided so that over-short distance or mutual contact of the adjacent metal contact layers are prevented, and the reliability and the yield of the semiconductor device are increased.

Description

technical field [0001] The invention relates to the technology in the field of semiconductor manufacturing, in particular to a method for forming a semiconductor device. Background technique [0002] With the continuous increase of the integration level of semiconductor devices, the critical dimensions of semiconductor devices are continuously reduced, and many problems have appeared correspondingly, such as the corresponding increase in surface resistance and contact resistance of the drain, source and gate structures of semiconductor devices, resulting in the decrease of semiconductor devices. The response speed is reduced and the signal is delayed. Therefore, an interconnection structure with low resistivity becomes a key element in the manufacture of highly integrated semiconductor devices. [0003] In order to reduce the contact resistance of the drain-source and gate structures of semiconductor devices, the process method of metal silicide is introduced. The metal sil...

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Problems solved by technology

[0005] However, with the continuous shrinking of the size of semiconductor structures, the formed semiconductor devices have problems of poor reliability and low yield, espec

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