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Integrated circuit package

A technology of integrated circuits and metal layers, applied in the field of integrated circuit packaging with stress relief structures, capable of solving problems such as failure of IC packaging 100

Active Publication Date: 2016-03-02
MEDIATEK INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Also, the IC package 100 will fail due to delamination issues

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  • Integrated circuit package
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Embodiment Construction

[0027] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0028] Certain terms are used in the description and claims of this application to refer to particular components. Those skilled in the art should understand that although hardware manufacturers may use different terms to refer to the same component, this specification and claims do not distinguish components by differences in names, but by differences in functions of components. criteria for distinction. The terms "comprising", "comprising" and other similar terms mentioned throughout the specification and claims are all open-ended terms, so they should be interpreted ...

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Abstract

The present invention provides an integrated circuit (IC) package. The IC package comprises: a metal plane, a substrate, an IC chip, and an IC fill layer. The substrate is formed on the metal plane. The IC chip is formed on the substrate. The IC fill layer is formed around the IC chip. The metal plane has at least one first etching line for separating the metal plane into a plurality of metal plane areas. The at least one first etching line forms at least one half cut line or at least one full cut line in the metal plane and the substrate. According to the invention, the metal plane is separated into the metal plane areas via the etching line, thereby releasing stress and solving the delamination problem.

Description

technical field [0001] The invention relates to the technical field of integrated circuit packaging, in particular to an integrated circuit packaging with a stress relief structure. Background technique [0002] Please refer to figure 1 , figure 1 is a schematic diagram of an existing IC (integrated circuit, integrated circuit) package 100 during a reflow soldering process. Such as figure 1 As shown, a conventional IC package 100 includes: a copper layer 102 , a substrate 104 , an IC chip 106 and an IC fill layer 108 . Such as figure 1 As shown, after the solder reflow process, delamination occurs due to the large stress between the copper layer 102 , the substrate 104 and the IC chip 106 . Also, IC package 100 will fail due to delamination issues. Contents of the invention [0003] In view of this, an embodiment of the present invention provides an integrated circuit package to solve the above delamination problem. [0004] An embodiment of the present invention pr...

Claims

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Application Information

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IPC IPC(8): H01L23/13H01L23/14
CPCH01L23/3121H01L2224/48091H01L2924/00014H01L23/13H01L23/562H01L2224/45099H01L2224/45015H01L2924/207H01L23/3107H01L23/49838
Inventor 張晋强郑道
Owner MEDIATEK INC
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