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Etching method, method of manufacturing article and semiconductor device, and etching solution

An etchant and semiconductor technology, applied in semiconductor/solid-state device manufacturing, chemical instruments and methods, surface etching compositions, etc., can solve problems such as not reaching vertical

Active Publication Date: 2016-03-23
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to different conditions, sometimes the vertical

Method used

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  • Etching method, method of manufacturing article and semiconductor device, and etching solution
  • Etching method, method of manufacturing article and semiconductor device, and etching solution
  • Etching method, method of manufacturing article and semiconductor device, and etching solution

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Embodiment Construction

[0050]Embodiments will be described in detail below with reference to the drawings. In the drawings, components having the same or similar functions are denoted by the same reference signs.

[0051] In the etching method involved in the embodiment, first, prepare figure 1 Structure 10 shown. The structure 10 is made of a semiconductor. The semiconductor can be selected from, for example, semiconductors made of compounds of Group III elements and Group V elements such as Si, Ge, GaAs, and GaN, and SiC. In addition, the term "group" used here is a "group" of the short-period type periodic table.

[0052] The structure 10 is, for example, a semiconductor wafer. The semiconductor wafer may be doped with impurities, and semiconductor elements such as transistors and diodes may be formed. In addition, the main surface of the semiconductor wafer may be parallel to any crystal plane of the semiconductor.

[0053] Next, an insulating layer 20 is formed on the structure 10 .

[0...

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PUM

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Abstract

The present invention provides an etching method, a method of manufacturing an article and a semiconductor device, and an etching solution. The etching method according to an embodiment includes forming a catalyst layer made of a noble metal on a structure made of a semiconductor, and dipping the structure in an etching solution containing hydrofluoric acid, an oxidizer, and an organic additive to remove a portion of the structure that is in contact with the catalyst layer.

Description

[0001] This application claims priority based on Japanese Patent Application No. 2014-185570 filed on September 11, 2014, and seeks the benefits thereof, the entire contents of which are hereby incorporated by reference. technical field [0002] All of the various embodiments described here relate to etching methods, methods of manufacturing articles and semiconductor devices, and etching solutions. Background technique [0003] In the manufacturing process of microstructures including the manufacturing process of MicroElectroMechanicalSystems (MEMS) and Through-Silicon Via (TSV): on a substrate formed of a semiconductor such as silicon (Si), the thickness of several μm The necessity of deep etching technology for forming trenches or via holes at a depth of ~ tens of μm is increasing. [0004] In the etching of semiconductors, isotropic wet etching using etching solutions such as hydrofluoric acid, nitric acid, and acetic acid, and various alkaline solutions such as TetraMet...

Claims

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Application Information

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IPC IPC(8): H01L21/306C09K13/00C23F1/16
CPCC09K13/08C23F1/16H01L21/30608H01L21/30604H01L21/78H01L21/30617H01L21/32134
Inventor 浅野佑策
Owner KK TOSHIBA