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Task-level parallel scheduling method and system for dynamically reconfigurable processor

A scheduling system and scheduling method technology, applied in the computer field, can solve the problem that reconfigurable processors do not have parallel processing specifications

Active Publication Date: 2016-04-13
SHANGHAI JIAO TONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, there is no unified parallel processing specification for the general-purpose reconfigurable processor targeted by the present invention

Method used

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  • Task-level parallel scheduling method and system for dynamically reconfigurable processor
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  • Task-level parallel scheduling method and system for dynamically reconfigurable processor

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Embodiment Construction

[0029] The specific embodiments of the present invention are given below in conjunction with the accompanying drawings, but the present invention is not limited to the following embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in very simplified form and use imprecise ratios, which are only used for the purpose of conveniently and clearly assisting in describing the embodiments of the present invention.

[0030] Please refer to figure 1 , figure 1 Shown is a schematic structural diagram of a task-level parallel scheduling system of a dynamically reconfigurable processor according to a preferred embodiment of the present invention, wherein the enlarged view of RPU1 on the right side of the box is used to display its internal functional structure. The present invention proposes a task-level parallel scheduling system of a dynamically reconfigurable processor, i...

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Abstract

The invention proposes a task-level parallel scheduling method and system for a dynamically reconfigurable processor. The system comprises a main controller, a plurality of reconfigurable processing units, a main memory, a direct memory access device and a system bus, wherein each reconfigurable processing unit consists of a co-controller, a plurality of reconfigurable processing element arrays in charge of reconfigurable calculation and a plurality of shared memories used for data storage; the reconfigurable processing element arrays and the shared memories are adjacently arranged; and the shared memories can be read and written by the two connected reconfigurable processing element arrays around. According to the task-level parallel scheduling method and system for the dynamically reconfigurable processor, different scheduling modes can be executed for different tasks by adjusting the scheduling method, and basically all parallel tasks can be well accelerated in parallel in the reconfigurable processor.

Description

technical field [0001] The invention relates to the field of computers, and in particular to a task-level parallel scheduling method and system of a dynamically reconfigurable processor. Background technique [0002] In the previous processor computing models, they are usually divided into the following two categories. The traditional general-purpose computing based on the von Neumann processor is extremely flexible, but its instruction stream-driven execution mode, limited computing unit and memory bandwidth make its overall performance and power consumption unsatisfactory. Dedicated computing can optimize structures and circuits for specific applications without requiring an instruction set, with fast execution speed and low power consumption. However, there are fatal flaws in dedicated computing systems, such as poor flexibility and scalability, and the ever-evolving and more complex applications often cannot be completed through simple expansion. For different applicat...

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Application Information

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IPC IPC(8): G06F9/38
CPCG06F9/3836
Inventor 田丰硕赵仲元绳伟光何卫锋
Owner SHANGHAI JIAO TONG UNIV
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