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Processor architecture capable of being reconstructed and reconstruction method thereof

A processor architecture and processor technology, applied in the architecture with a single central processor, electrical digital data processing, instruments, etc., can solve the problems of various processor architectures and inconvenience for users to learn and implement, and achieve the effect of convenient learning

Active Publication Date: 2016-04-20
CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

The diversity of task requirements leads to a variety of processor architectures, and it is inconvenient for users to learn and implement

Method used

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  • Processor architecture capable of being reconstructed and reconstruction method thereof
  • Processor architecture capable of being reconstructed and reconstruction method thereof
  • Processor architecture capable of being reconstructed and reconstruction method thereof

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Embodiment Construction

[0029] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0030] A reconfigurable processor architecture. The computing macro built with a set of computing and storage components is the smallest reconfiguration particle. It uses static reconfiguration to complete the reorganization of the internal architecture of the processor, which is suitable for different application scenarios.

[0031] The reconfigurable processor architecture includes 4 instruction caches (instruction cache), 16 operation macros, shared data memory, shared program memory, and peripherals. The 16 operation macros are connected to the instruction cache through the instruction bus, the instruction cache is connected to the crossbar, each peripheral is also connected to the crossbar, the operation macro and the crossbar are connected to the shared data memory, and the instruction cache is connected to the shared program memory. The instruction bus adopts ...

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Abstract

The invention discloses a processor architecture capable of being reconstructed. The processor architecture internally comprises four instruction caches, sixteen operation macros, a shared data storage unit, a shared program storage unit and peripherals. The sixteen operation macros are connected to the instruction caches through four instruction buses. The instruction caches are connected to a crossbar switch. The peripherals are connected with the crossbar switch. The operation macros and the crossbar switch are connected to the shared data storage unit. The instruction caches are connected to the shared program storage unit. The instruction buses are in a flow line mode. The processor capable of being reconstructed has two working modes which are the discrete mode and the regrouping mode. In the regrouping mode, the operation macros and instruction flow lines are regrouped to build different-scale logic cores. The invention further provides a reconstruction method. The processor architecture capable of being reconstructed and the reconstruction method have the advantages that processor structure regrouping is carried out for different application requirements, computing platform universalization under different application characteristics is achieved, the processor architecture is unified, and user leaning is facilitated.

Description

technical field [0001] The invention relates to a reconfigurable processor architecture, which belongs to the technical field of microprocessor design. Background technique [0002] In modern signal processing applications, the polarization between task-level parallelism and data-level parallelism is becoming more and more serious. In engineering implementation, different processor hardware platforms need to be constructed according to the requirements of different application fields. For task-level parallelism, it is necessary to build a multi-core processor platform to meet the requirements of multi-task concurrency; for data-level parallelism, it is necessary to build a single-core processor platform, and for single-task applications, select a single-core processor with strong processing capabilities to build a system. The diversity of task requirements leads to a variety of processor architectures, which makes it inconvenient for users to learn and implement. [0003] ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78
CPCG06F15/7878
Inventor 刘小明洪一马强黄光红王媛刘谷李岩万晓佳
Owner CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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