Transistor forming method

Abstract

The invention discloses a transistor forming method. The transistor forming method is characterized in that a dummy grid film is disposed on a surface of a substrate; the dummy grid film is provided with ions in a doped manner, and a doped area and a non-doped area are formed in the dummy grid film, and in addition, the surface of the doped area is aligned with the surface of the dummy grid film, and the non-doped area is disposed on the bottom part of the doped area; after the dummy grid film is provided with the ions in a doped manner, parts of the dummy grid film can be etched until parts of the surface of the substrate is exposed, and the surface of the substrate is provided with dummy grid layers; the side walls of the dummy grid layers can be thinned, and the side walls of the non-doped area is recessed with respect to the side walls of the doped area; after the thinning of the side walls of the dummy grid layers, source-drain areas can be formed in the substrate on two sides of the dummy grid layers; after the forming of the source-drain areas, and dielectric layers can be formed on the surface of the substrate, and in addition, the dielectric layers are disposed on the side walls of the dummy grid layers in a covered manner, and the surfaces of the dielectric layers are aligned with the surfaces of the dummy grid layers; the dummy grid layers are removed, and first openings are formed in the dielectric layers; and grids can be formed in the first openings. The performance of the formed transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a transistor. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits, especially MOS (Metal Oxide Semiconductor, metal-oxide-semiconductor) devices, is continuously reduced to meet the miniaturization and integration of integrated circuit development. Requirements, and transistor devices are one of the important components of MOS devices. [0003] For transistor devices, as the size of the transistor continues to shrink, the gate dielectric layer formed of silicon oxide or silicon oxynitride material in the prior art cannot meet the performance requirements of the transistor. In particular, transistors formed with silicon oxide or silicon oxynitride as the gate dielectric layer are prone to a series of problems such as leakage curren...

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Problems solved by technology

[0005] However, with the continuous reduction of semiconductor process nodes, the size of the formed high-k metal gate transistors is continuously reduced and the device density is con...

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