Reverse conducting MOS gate-controlled thyristor and fabrication method thereof
A reverse-conducting, thyristor technology, applied in the field of power semiconductor devices, can solve problems such as adverse effects of forward conduction, voltage stagnation, and device damage, and achieve the effects of suppressing the snapback effect, large current conduction capability, and reducing the effective area.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2016-06-15
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Abstract
Description
technical field
[0001] The invention belongs to the field of power semiconductor devices, and in particular relates to a reverse conduction type MOS gate-controlled thyristor and a manufacturing method thereof. Background technique
[0002] With the continuous development of human society, energy consumption is also increasing. While increasing output, there are higher and higher requirements for the utilization rate of electric energy. The realization of these requirements depends on the development of power electronic devices. As a new type of power device, MOS gate-controlled thyristor has also attracted everyone's attention.
[0003] MOS Gated Thyristor (MOSGated Thyristor), referred to as MGT, is a composite device that combines the characteristics of MOSFET and thyristor. At the same time, it has the advantages of high input impedance of MOSFET, convenient gate-level control, high blocking voltage and low conduction voltage drop of thyristor, and is widely used in th...
Examples
Embodiment Construction
[0033] Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail:
[0034] figure 2 It is a structural schematic diagram of a reverse conduction type MOS gate-controlled thyristor of the present invention. As shown in the figure, it includes metallized cathode 1, gate electrode 2, gate oxide layer 3, P well 4, N well 5, P well 6, N drift region 7, P floating layer 8, N anode region 9, and P anode Region 10, metallized anode 11 and anode isolation oxide layer 12; P well 6 is located on top of N drift region 7, N well 5 is located in P well 6, P well 4 is located in N well 5, gate oxide layer 3 is located in N well 5 , the surfaces of the P well 6 and the N drift region 7, the gate electrode 2 is located on the surface of the gate oxide layer 3, and the metallized cathode 1 covers the N well 5, the P well 6 and a part of the P well 4. The lower surface of the N drift region 7 has a P floating region 8, between the P floating ...