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NAND Flash fault tolerant system based on FPGA (Field Programmable Gate Array)

A fault-tolerant system and subsystem technology, applied in static memory, instruments, etc., can solve the problems that data cannot be read and written normally, invalid blocks cannot be erased, and Flash is scrapped, so as to solve the problem of bad block detection and management problems, overall performance and processing speed guarantees, and low-cost effects

Active Publication Date: 2016-06-22
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Since the process of NAND Flash cannot guarantee the reliable performance of NAND MemoryArray during its life cycle, there will be invalid blocks that cannot be erased during use and use, that is, bad blocks
The bad blocks that existed at the time of release cannot be used to store data, and have been marked by the manufacturer. However, some bits of the bad blocks caused by the increase in the number of uses the day after tomorrow cannot be flipped, making the system unstable and causing the data in the Flash to fail to be stored normally. Read and write indefinitely, and even cause problems such as Flash scrapping

Method used

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  • NAND Flash fault tolerant system based on FPGA (Field Programmable Gate Array)
  • NAND Flash fault tolerant system based on FPGA (Field Programmable Gate Array)
  • NAND Flash fault tolerant system based on FPGA (Field Programmable Gate Array)

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Embodiment Construction

[0021] The present invention will be further described below in conjunction with drawings and embodiments.

[0022] Such as figure 1 As shown, the FPGA-based NAND Flash fault-tolerant system proposed by the present invention includes a Flash bad block management subsystem, a USB communication subsystem and a host computer. The Flash bad block management subsystem is composed of FPGA and Flash array. It detects the factory bad blocks by querying the flag bits of the Flash in the sparearea, checks the return status of the read, write and erase operations, detects the damaged blocks, and records the addresses of all bad blocks. Divide the Flash into three logical areas, namely mapped good block area, bad block area, and information storage area, and establish an address mapping table to store in the information storage area. As the core controller, FPGA communicates with the host computer through the USB communication subsystem, and can receive control instructions and upload da...

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Abstract

The invention discloses an NAND Flash fault tolerant system based on an FPGA (Field Programmable Gate Array). The NAND Flash fault tolerant system comprises a Flash bad block management subsystem, a USB (Universal Serial Bus) communication subsystem and an upper computer, wherein the Flash bad block management subsystem consists of the FPGA and a Flash array, and is used for detecting factory bad blocks by querying a flag bit of Flash in a spare area, querying return states of a reading operation, a writing operation and an erasing operation to detect lost bad blocks, and recording addresses of all the bad blocks. The Flash is partitioned into three logical areas, namely, a mapping good block area, a bad block area and an information storage area respectively, and an address mapping table is built and stored in the information storage area. The FPGA serves as a core controller, is communicated with the upper computer through the USB communication subsystem, and can receive a control instruction sent by the upper computer and upload data. A usage condition, including a space size of the good block area, a data storage status and the like of a current NAND Flash array can be queried through the upper computer; automatic detection can be performed to update the address mapping table; and stored data in the Flash array can be read, and data can be stored in the Flash array.

Description

technical field [0001] The invention relates to Flash fault-tolerant technology, in particular to an FPGA-based NAND Flash fault-tolerant system. Background technique [0002] With the continuous development of information technology, digital products have become a vital part of life. In the process of people's continuous pursuit of high-quality life, the capacity and processing performance of digital products such as smart phones, digital cameras, and players need to be improved urgently. At the same time, the storage industry is facing development opportunities brought about by huge demand. In today's civilian consumer electronics market, flash memory (Flash) plays a major role in non-volatile storage media. According to the difference in logical structure, it can be divided into two types: NORFlash and NANDFlash. NORFlash occupies a dominant position in the early market. After technological innovation, NANDFlash emphasizes reducing the cost per bit. It can be easily up...

Claims

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Application Information

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IPC IPC(8): G11C29/54G11C29/56
CPCG11C29/54G11C29/56008G11C2029/5606
Inventor 张晓峰史治国陈积明
Owner ZHEJIANG UNIV
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