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Package structure applicable to different-surface electrode laser chip

A packaging structure and laser technology, applied in lasers, laser components, semiconductor lasers, etc., can solve problems affecting test results, device transmission and reflection performance, etc., to avoid the use of gold wire and reduce the effect of impact

Active Publication Date: 2016-06-29
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when testing, the parasitic parameters brought by the gold wire will directly affect the test results
Especially in the packaging of high-speed laser array chips, the parasitic capacitance and inductance introduced by many gold wires will generate resonance, which will seriously affect the transmission and reflection performance of the device

Method used

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  • Package structure applicable to different-surface electrode laser chip
  • Package structure applicable to different-surface electrode laser chip
  • Package structure applicable to different-surface electrode laser chip

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Embodiment Construction

[0017] In order to make the purpose, technical scheme and advantages of the present invention clearer, now in conjunction with the attached Figure 1-Figure 3 Its specific application in optical coupling is further described in detail.

[0018] In traditional chip packaging, gold wires are required, which introduces parasitic parameters and affects device performance. Therefore, the present invention proposes a packaging structure applied to laser chips with different-surface electrodes, such as the attached figure 1 . The different-plane laser chip mainly includes: an upper dielectric substrate 1, which mainly plays the role of supporting the surface electrodes; the surface adopts a thin film process to vapor-deposit electrodes with a certain thickness as a ground plane; a lower dielectric substrate 2, which mainly plays the role of supporting the surface electrodes and the laser chip; Coplanar waveguide electrodes with a certain thickness are evaporated on the surface by t...

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Abstract

The invention discloses a package structure with regard to a different-surface electrode laser chip. The package structure comprises an upper dielectric substrate, a lower dielectric substrate and a conduction column array. A different-surface electrode of the laser chip is changed to a coplanar electrode by a sandwich structure formed by the upper dielectric substrate and the lower dielectric substrate so as to achieve connection with an external radio frequency circuit. Compared with a traditional method of changing the different-surface electrode to the coplanar electrode by a gold wire, the package structure proposed by the invention has the advantages that the usage of the gold wire is avoided, the influence of a parasitic parameter introduced by the gold wire on device performance is reduced, and the package structure is suitably used for package of single-channel and multi-channel integrated chips.

Description

technical field [0001] The invention belongs to the field of optoelectronic / microelectronic devices, and more specifically relates to a packaging structure applied to a laser chip with electrodes on different surfaces. Background technique [0002] In the packaging of optoelectronic chips, since the laser chip has a different-plane electrode structure, the current common method is to use gold wires to connect the laser electrodes to the carrier with coplanar electrodes, so as to realize the electrical connection with the test port of the vector network analyzer or the shell. interface connection. However, when testing, the parasitic parameters brought by the gold wire will directly affect the test results. Especially in the packaging of high-speed laser array chips, the parasitic capacitance and inductance introduced by many gold wires will generate resonance, which will seriously affect the transmission and reflection performance of the device. Contents of the invention ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01S5/022
CPCH01S5/02345H01S5/0237
Inventor 张志珂刘宇赵泽平祝宁华
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI