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Reliable interconnect

A technology of conductive interconnection and contact area, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., and can solve problems such as interconnection damage

Active Publication Date: 2016-08-17
UTAC HEADQUARTERS PTE LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when high-speed ICs are provided, the electrical or mechanical reliability of the ICs, especially the interconnections of the ICs can be compromised

Method used

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Examples

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Embodiment Construction

[0011] Embodiments generally relate to semiconductor packaging. For example, the package has contact areas coupled to conductive interconnects such as but not limited to wire bonds. In some embodiments, at least one contact region includes a buffer layer disposed thereon. For example, the contact areas may be bonded to copper wires. Such semiconductor packages are widely used in electronic devices. For example, the device may be a memory device, a wireless communication device, or an automotive control device. The devices may be incorporated into consumer products, such as consumer electronics. Incorporating the device into other applications is also useful.

[0012] figure 1 A simplified cross-sectional view of a semiconductor package is shown. Such as figure 1 The illustrated semiconductor package 100 includes a package substrate 101 . The packaging substrate includes a first main surface 101a and a second main surface 101b. The first main surface 101a may be called...

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PUM

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Abstract

A device and a method for forming the device are disclosed. The device includes a contact region disposed over a last interconnect level of the device. The device includes a final passivation layer having at least an opening which at least partially exposes a top surface of the contact region and a buffer layer disposed at least over a first exposed portion of the top surface of the contact region. When an electrically conductive interconnection couples to the contact region, the buffer layer absorbs a portion of a force exerted to form an interconnection between the electrically conductive interconnection and the contact region.

Description

Background technique [0001] It has always been a desire to provide integrated circuits (ICs) at low cost to meet customer expectations. In addition, there is always a need to provide high-speed ICs by reducing the RC time constant of the signal propagation path to increase the signal transmission speed. However, when high-speed ICs are provided, the electrical or mechanical reliability of the ICs, especially the interconnections of the ICs can be compromised. [0002] Based on the above discussion, it would be desirable to provide reliable interconnects and to provide simplified and low-cost methods for forming such reliable interconnects. Contents of the invention [0003] Embodiments generally relate to semiconductor devices and methods of forming semiconductor devices. In one embodiment, a device is disclosed. The device includes a contact region disposed over a final interconnect level of the device. The device includes a final passivation layer having at least an op...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/485H01L23/488H01L21/60
CPCH01L24/10H01L24/26H01L24/81H01L24/83H01L23/3171H01L24/03H01L24/05H01L24/32H01L24/45H01L24/48H01L24/73H01L24/85H01L2224/04042H01L2224/05017H01L2224/05124H01L2224/05147H01L2224/0519H01L2224/0529H01L2224/05393H01L2224/05552H01L2224/05558H01L2224/05618H01L2224/05644H01L2224/05655H01L2224/05664H01L2224/2919H01L2224/32225H01L2224/45139H01L2224/45144H01L2224/45147H01L2224/45164H01L2224/48227H01L2224/48453H01L2224/48465H01L2224/48507H01L2224/73265H01L2924/00014H01L2924/013H01L2924/01029H01L2924/00
Inventor 黄锐胡振鸿迪马·巴巴澜·小安东尼奥
Owner UTAC HEADQUARTERS PTE LTD