Synchronous timing control device, synchronous timing control method and receiver
A technology for synchronizing timing and control devices, applied in the directions of synchronizing devices, synchronizing receivers, digital transmission systems, etc., can solve the problems of unable to perform demodulation signal processing, unable to detect the boundary position of received signal symbols, etc., to reduce time deviation , the effect of accurate timing
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Embodiment approach 1
[0036] Figure 4 It is a block diagram showing a configuration example of a synchronous timing control device (a device to which the synchronous timing control method of the first embodiment is applied) 1 according to Embodiment 1 of the present invention. The synchronous timing control device 1 may constitute, for example, a part of a receiver for receiving OFDM signals. The receiver is, for example, a digital broadcast receiving device, a digital radio receiving device, or the like. Such as Figure 4 As shown, the synchronous timing control device 1 is configured to receive a received signal R as an input signal, perform signal processing on the received signal R, and output a frequency analysis result signal Y. The received signal R is obtained, for example, from a quadrature demodulator (described later) as a component of the receiver. Figure 16 Shown) output complex baseband signal. The frequency analysis result signal Y is a signal group in the frequency domain tran...
Embodiment approach 2
[0085] Figure 14 It is a block diagram showing a specific operation example of the correlation calculation unit 10 a in the synchronization timing control device (device to which the synchronization timing control method is applied) according to Embodiment 2 of the present invention. exist Figure 14 in, right with Figure 5 The constituent elements shown are the same or the corresponding constituent elements are labeled with Figure 5 The numbers shown are the same as those shown. Such as Figure 14 As shown, the correlation calculation unit 10a has a plurality of processing units 105, and the plurality of processing units 105 each have a delay unit 101 and a calculation unit 103. The received signal R can be input to a plurality of processing units 105 in parallel, respectively, and a plurality of correlation operations are executed in parallel. The correlation computing section 10a can be applied as Figure 4 Shown in the correlation computing section 10. Therefore,...
Embodiment approach 3
[0095] Figure 16 It is a block diagram schematically showing the configuration of the receiver 80 according to Embodiment 3 of the present invention. The receiver of Embodiment 3 is, for example, a terrestrial digital broadcasting receiver. Such as Figure 16 As shown, the receiver according to Embodiment 3 includes: a tuner 81 for converting a signal received through an antenna into an intermediate frequency signal; Converter 82 , local oscillator 83 that generates a reference frequency signal, and quadrature demodulator 84 that converts the digital signal output from AD converter 82 into a baseband digital signal (baseband signal) using the reference frequency signal. These structures 81, 82, 83, and 84 are also referred to as receiving sections. In addition, the receiver according to Embodiment 3 includes: an equalizer 85 that equalizes the baseband signal converted by the quadrature demodulator 84; Error correction section 86 for processing. The receiver according to...
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