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Low noise frequency multiplier based on phase-locked loop circuit

A phase-locked loop and frequency multiplier technology, which is applied in the field of low-noise frequency multipliers, can solve problems such as excessive noise of frequency multipliers, achieve signal stability, reduce frequency multiplier noise, and reduce harmonics

Inactive Publication Date: 2016-09-28
CHENGDU KANUOYUAN TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The purpose of the present invention is to overcome the defect of excessive noise of the current frequency multiplier, and provide a low-noise frequency multiplier based on a phase-locked loop circuit

Method used

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  • Low noise frequency multiplier based on phase-locked loop circuit

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Effect test

Embodiment

[0017] Such as figure 1 Shown, the present invention is mainly by processing chip U, the phase-locked loop circuit that is connected with processing chip U, the harmonic elimination circuit that is connected with processing chip U and phase-locked loop circuit respectively, one end is connected with the VDD pin of processing chip U The other end is connected to the resistor R5 of the 5V power supply, one end is connected to the VSS pin of the processing chip U, the other end is connected to the resistor R6 of the power supply, the positive pole is connected to the RC pin of the processing chip U, and the negative pole is connected to the resistor R8. A capacitor C3 connected to the R pin of the processing chip U, one end connected to the C pin of the processing chip U, the other end connected to the negative pole of the capacitor C3, and a resistor R7 connected to the Q pin of the processing chip U. connected to the output amplifier circuit. In order to better implement the p...

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Abstract

The invention discloses a low noise frequency multiplier based on phase-locked loop circuit, which is characterized by consisting of a processing chip U, a phase-locked circuit connected to the processing chip, a harmonic wave elimination circuit connected to the processing chip U and the phase-locked loop circuit, a resistor R5, a resistor R6, a capacitor C6, and a resistor R7; one end of the resistor R5 is connected to the VDD tube leg of the processing chip U and the other end of the resistor R5 is connected to a 5V power supply; one end of the resistor R6 is connected to the VSS tube leg of the processing chip and the other end of the resistor R6 is connected to a power supply; the anode of the capacitor C3 is connected to the RC tube leg of the processing chip and the cathode of the capacitor C3 is connected to the R tube leg of the processing chip through a resistor R8; and one end of the resistor R7 is connected to the C tube leg of the processing chip and the other end of the resistor R7 is connected to the cathode of the capacitor C. The low noise frequency multiplier based on phase-locked loop circuit processes phases of signals, enables the phase of the signal to be more stable, avoids lock missing of the phase during a signal conversion process, and greatly improves stability of signals.

Description

technical field [0001] The invention relates to a frequency multiplier, in particular to a low-noise frequency multiplier based on a phase-locked loop circuit. Background technique [0002] With the continuous development of electronic technology, frequency multipliers are used more and more widely. For example, the transmitter can make the main oscillator oscillate at a lower frequency to improve frequency stability; Large frequency offset; in the phase keying communication machine, the frequency multiplier is an important component of the carrier recovery circuit. It can be seen that the frequency multiplier plays an important role in the process of industrial production. However, the currently used frequency multiplier generates a large number of harmonics, which makes the phase of the output signal unstable, resulting in excessive noise of the frequency multiplier. Moreover, the higher the number of frequency multiplications, the greater the frequency multiplication no...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03B19/14H03L7/08
CPCH03B19/14H03L7/08
Inventor 汤福琼
Owner CHENGDU KANUOYUAN TECH CO LTD