Shifting register, gate driving circuit and display device
A shift register and gate technology, applied in the field of gate drive circuits, display devices, and shift registers, can solve the problems of large jump voltage △Vp, inability to easily output scanning signals, and flickering of the display panel display.
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Embodiment 1
[0150] by Figure 4a The structure of the shift register shown is taken as an example to describe its working process, wherein, in Figure 4a In the shift register shown, all the switch transistors are N-type switch transistors, and the voltage amplitude of the first clock signal terminal CK1 is V CK1 and the voltage amplitude V of the second clock signal terminal CK2 CK2 Not the same, the potential of the reference signal terminal VSS is low potential, the corresponding input and output timing diagram is as follows Figure 5a shown. Specifically, choose the Figure 5a The five stages of T1, T2, T3, T4 and T5 in the shown input and output timing diagram.
[0151] In the T1 phase, Input=1, Reset=0, CK1=0, CK2=0, CK3=1, CS1=0, CS2=1.
[0152] Because Reset=0, so the seventh switch transistor M7 and the twelfth switch transistor M12 are both cut off; because Input=1, so the sixth switch transistor M6 is turned on; The signal of high potential is provided to the first node A...
Embodiment 2
[0168] by Figure 4b The structure of the shift register shown is taken as an example to describe its working process, wherein, in Figure 4b In the shift register shown, all switching transistors are P-type switching transistors, and the voltage amplitude of the first clock signal terminal CK1 is V CK1 and the voltage amplitude V of the second clock signal terminal CK2 CK2 Not the same, the potential of the reference signal terminal VSS is high potential, and the corresponding input and output timing diagram is as follows Figure 5b shown. Specifically, choose the Figure 5b The five stages of T1, T2, T3, T4 and T5 in the shown input and output timing diagram.
[0169] In the T1 phase, Input=0, Reset=1, CK1=1, CK2=1, CK3=0, CS1=1, CS2=0.
[0170] Because Reset=1, so the seventh switch transistor M7 and the twelfth switch transistor M12 are all cut off; Because Input=0, so the sixth switch transistor M6 is turned on; Because the sixth switch transistor M6 is turned on and...
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