Radiation resistance fault tolerance circuit design method based on AND gate, Or gate and selector

Abstract

The invention belongs to the integrated circuit field, relates to a radiation resistance circuit design method and particularly relates to a radiation resistance fault tolerance design method based on an AND gate, an OR gate and a selector. The radiation resistance fault tolerance circuit design method uses an AND gate, an OR gate and an either-or selector to constitute a comparison voting circuit; a main output and a redundancy output of a protected circuit are respectively connected to two output ports of the comparison voting circuit; when the values of main output and the redundancy output of the protected circuit are different because of radiation, the output of the comparison voting circuit maintains an original value, and an output value of the protected circuit making an error is not outputted. According to a result of a testing experiment, the error occurrence numbers of the radiation resistance fault tolerance circuit design method and a triple modular redundancy scheme are few or equal; the radiation resistance capabilities of the radiation resistance fault tolerance circuit design method and the triple modular redundancy scheme are close, but the area and the power consumption of the radiation resistance tolerance circuit design method are much smaller than that of the triple modular redundancy scheme.

Description

technical field [0001] The invention belongs to the field of integrated circuits and relates to a radiation-resistant circuit design method, in particular to a radiation-resistant fault-tolerant circuit design method based on an AND gate, an OR gate and a selector. Background technique [0002] As the size of the process decreases, the integrated circuits in the chip are more and more susceptible to errors caused by heavy particle or proton radiation in high-level space or near-Earth space. Research has shown that if radiation occurs at a circuit node, it may cause a single-event transient pulse that changes the logic state of the circuit node. The erroneous value caused by the single event transient pulse is transmitted to the memory and may also be captured and stored. So single event transient pulses can change the logic state of the circuit nodes, possibly causing the circuit to malfunction. Therefore, it is necessary to propose a radiation-resistant circuit design met...

AI Technical Summary

Problems solved by technology

[0003] The design methods of radiation-resistant integrated circuits in the prior art mainly include multi-mode redundancy, error correction codes and radiation-resistant storage units, etc., wherein the multi-mode redundancy method is represented by triple-mode redundancy technology, using redundant circuit modules and The majority voting circuit shields the output of the wrong circuit module, but this method will bring a large area overhead; the error correction code method is represented by the Hamming code, and the location of the error bit is located by calculating the check value of the code; the radiation-resistant storage The cell method is represented by double interlocked memory cells, which add additional transistors and intertwined interconnection lines on the basis of the basic memory cell structure to enhance the radiation resistance of sensitive nodes; however, error correction codes and radiation-resistant memory cells will bring Comes to a larger area overhead and degrades circuit performance

Images