ATE (Automatic Test Equipment) digital testing system and self inspection method thereof

A digital test and self-test technology, applied in static memory, instruments, etc., can solve problems such as hidden dangers in products, and achieve the effect of stable equipment and low failure rate

Active Publication Date: 2017-01-25
ACETEC SEMICON
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If these situations that are often used in practice are not

Method used

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  • ATE (Automatic Test Equipment) digital testing system and self inspection method thereof
  • ATE (Automatic Test Equipment) digital testing system and self inspection method thereof
  • ATE (Automatic Test Equipment) digital testing system and self inspection method thereof

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Embodiment Construction

[0021] The present invention will be further described below in conjunction with specific drawings.

[0022] Such as figure 1 As shown, the ATE digital test system includes an address generator, a graphics memory, an instruction memory, a self-test memory, and a driver. The address generator is connected to the graphics memory, the instruction memory, and the self-test memory. The self-test memory is connected to the bus. Connect to the drive. Among them, the self-test memory can adopt the IS61LV12824 product of ISSI Company, which is a 128K*24-bit static memory. The address generator is implemented by FPGA. In this example, the EP1C6Q240C8 product of ALTERA Company is used to realize it. The main function is to generate addresses.

[0023] A self-test method for an ATE digital test system. When the system is running, an address generator generates an address and sends it to an instruction memory and a graphic memory as addresses. After receiving the address, the graphics m...

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Abstract

The invention discloses an ATE (Automatic Test Equipment) digital testing system and a self inspection method thereof. The ATE digital testing system comprises an address generator, a picture memory, an instruction memory, a self-inspection memory and a driver, wherein the address generator is connected with the picture memory, the instruction memory and the self-inspection memory; the self-inspection memory is connected with a bus, and the picture memory is connected with the driver. The self-inspection method disclosed by the invention is capable of effectively solving the part which is not verified by a traditional self-inspection method; pictures for self inspection comprise special instructions such as circulation, skip and block circulation except for plus one, then the moving locus of the pictures is monitored, so as to observe whether addresses change correspondingly according to micro-instructions under high-speed operation or not, so that whether the system performance and partial logic of the micro-instructions are normal or not can be verified; multiple potential problems which can not be discovered by traditional self inspection can be embodied to a greater extent, the factory equipment is relatively stable, the fault rate is relatively small, interference can be excluded more easily with pertinence during field failure, and problems are found.

Description

technical field [0001] The invention belongs to the technical field of ATE digital testing systems, and in particular relates to an ATE digital testing system and a self-checking method thereof. Background technique [0002] For digital test systems in the ATE field, self-inspection is essential in pre-delivery inspection and post-exit debugging. The purpose of self-inspection is to fully expose potential problems. Traditional self-inspection items include memory self-test check, drive loopback self-test, etc. The memory self-test is to write data into the on-board memory, and then read it out to judge whether the data is consistent, mainly to verify whether the function of the memory is good. The loopback self-test of the drive is to output a simple graphic from the drive, and then return to the drive through the internal or external path for comparison, and finally check whether the comparison result is consistent with the expectation. Although these traditional self-tes...

Claims

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Application Information

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IPC IPC(8): G11C29/56
CPCG11C29/56Y02D10/00
Inventor 高爽王浩
Owner ACETEC SEMICON
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