Semiconductor device and manufacture method

Abstract

The invention relates to the field of circuits and discloses a semiconductor device and a manufacture method. The semiconductor device comprises a circuit device, a cooling fin and a thermal interface material layer located between the circuit device and the cooling fin, wherein the circuit device and the cooling fin are arranged in a laminating manner; a packaging layer surrounds the side wall of the circuit device; a first surface of the thermal interface material layer is in thermal coupling with the circuit device and the packaging layer, and a second surface is in thermal coupling with the cooling fin. In the scheme, the packaging layer and the circuit device are both in thermal coupling with the thermal interface material layer, so that the contact area of the circuit device with the thermal interface material layer is increased, heat produced on the side wall of the circuit device can be transferred to the thermal interface material layer through the packaging layer and then transferred to the cooling fin, and the cooling effect of the semiconductor device is improved. By means of the packaging layer surrounding the circuit device, the laying area of the thermal interface material layer is increased, the area of a contact surface of the thermal interface material layer is increased, the interfacial stress is reduced, and the component reliability is improved correspondingly.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a circuit semiconductor device and a manufacturing method. Background technique [0002] Figure 1A Shown is an exemplary cross-sectional view of an integrated circuit chip and a part of its packaging structure in the prior art. The structure includes an integrated circuit chip 1A02 , a thermal interface material layer 1A04 and a heat sink 1A06 . Among them, the thermal interface material layer 1A04 has a plurality of metal particles 1A08 distributed in the form of a dispersed phase, and the heat generated by the integrated circuit chip 1A02 during operation is poured into the radiator 1A06 through the thermal interface material layer 1A04 on the back of the chip, but the existing In technology, due to the limitation of the size of the circuit chip 1A02 , the effect of heat transfer is low, and it is difficult to meet the heat dissipation requirements of high-power chips....

AI Technical Summary

Problems solved by technology

Among them, the thermal interface material layer 1A04 has a plurality of metal particles 1A08 distributed in the form of a dispersed phase, and the heat generated by the integrated circuit chip 1A02 during operation is poured into the heat sink 1A06 through the thermal interface material layer 1A04 on the back of the chip, but the existing In technology, due to the limited size of the circuit chip 1A02, the heat transfer effect is low, and it is difficult to meet the heat dissipation requirements of high-power chips.

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