Dynamic and static noc real-time monitoring configuration circuit for power consumption temperature

Abstract

The invention discloses a power consumption temperature oriented dynamic and static combined NoC (Network-on-Chip) real-time monitoring configuration circuit. The circuit is characterized in comprising a downlink module, a timing module, a configuration module, a collection module, X downlink package modules, (X*Y) monitoring modules, an uplink module and a DDR user interface module. According to the circuit, communication traffic of various communication nodes can be monitored and collected dynamically, communication tasks of the various communication nodes of the NoC are configured dynamically, so the balance of the communication traffic of the various communication nodes of the NoC is ensured, a partial hotspot resulting from the fact that the partial communication traffic of the NoC is excessively high is avoided, and the integrated performance of the NoC is improved.

Description

technical field [0001] The invention belongs to the communication technology field of integrated circuit on-chip network, and in particular relates to a NoC real-time monitoring and configuration circuit for power consumption temperature combined with dynamic and static. Background technique [0002] Although the change of network-on-chip (NoC) replacing the traditional bus structure overcomes various problems caused by the traditional structure to a certain extent, with the increase of IP (Intellectual Property) cores and the increase of communication volume, with the With the reduction of the chip size and the improvement of the overall performance, the overall performance of the NoC has become the focus of the design. When the communication data is transmitted in the NoC, the communication traffic of the local communication nodes of the NoC is too high, which will inevitably lead to an increase in the local temperature of the chip. The high temperature makes the chip The ...

AI Technical Summary

Problems solved by technology

[0002] Although the change of network-on-chip (NoC) replacing the traditional bus structure overcomes various problems caused by the traditional structure to a certain extent, with the increase of IP (Intellectual Property) cores and the increase of communication volume, with the With the reduction of the chip size and the improvement of the overall performance, the overall performance of the NoC has become the focus of the design. When the communication data is transmitted in the NoC, the communication traffic of the local communication nodes of the NoC is too high, which will inevitably lead to an increase in the local temperature of the chip. The high temperature makes the chip The performance of the device is affected and may even damage the device, which greatly weakens the advantages of the NoC and directly affects the performance of the NoC system. Therefore, it is necessary to reduce the communication traffic of the NoC local communication nodes

[0003] In the existing technology, although the NoC can be monitored and configured, such as "Research on Configurable and Monitorable NoC Prototype Platform" in 2010, "monitorable" in this paper refers to the monitoring of throughput and delay. "Configurable" is the configuration of the NoC's own parameters (such as the depth of the cache FIFO, routing algorithm, and output arbitration algorithm). The disadvantage of this method is that,

[0004] 1. It can only monitor the overall communication volume of the NoC, but cannot monitor the communication volume of each node of the NoC. It can only know the overall performance and communication status of the NoC, but cannot know the specific performance and communication status of each node of the NoC;

[0005] 2. While realizing configurability, it may cause the communication tasks to be concentrated, so that the communication volume of a single node is too large, resulting in local hot spots and affecting the performance of the chip

Images