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Method of forming metal interconnects

A metal interconnection and conversion technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc.

Active Publication Date: 2020-03-03
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, challenges arise in developing a robust process for forming metal interconnects with low resistance

Method used

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  • Method of forming metal interconnects
  • Method of forming metal interconnects
  • Method of forming metal interconnects

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Embodiment Construction

[0011] The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are examples only and are not intended to be limiting. For example, in the following description, the formation of a first feature over or on a second feature may include embodiments in which the first feature and the second feature are formed in direct contact, and may also include embodiments in which additional features may be formed between the first feature and the second feature. An embodiment is formed between features such that the first feature and the second feature may not be in direct contact. In addition, the present invention may repeat reference numerals and / or letters in various instances. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embod...

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Abstract

A method of fabricating a semiconductor device is disclosed. The method includes forming a first conductive feature over a substrate, forming a dielectric layer over the first conductive feature, forming a via trench in the dielectric layer, forming a first barrier layer in the via trench. Therefore the first barrier has a first portion disposed over the dielectric layer and a second portion disposed over the first conductive feature, applying a thermal treatment to convert the first portion of the barrier layer to a second barrier layer and exposing the first conductive feature in the via trench while a portion of the second barrier layer is disposed over the dielectric layer.

Description

technical field [0001] The present invention relates to the field of semiconductors, and more particularly, to methods of forming metal interconnects. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC design and materials have produced generations of ICs, each generation having smaller and more complex circuits than previous generations. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) has generally increased, while geometry size (ie, the smallest component (or line) that can be created using a fabrication process) has decreased. [0003] This scaling down process generally provides benefits by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of IC processing and manufacturing. To achieve these advances, similar developments in IC processing and manufacturing are r...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/324
CPCH01L21/324H01L21/76841H01L21/76843H01L21/7685H01L21/76831H01L21/76844H01L21/76855H01L23/53238H01L23/53252H01L23/53266
Inventor 杨士亿李明翰眭晓林郭子骏
Owner TAIWAN SEMICON MFG CO LTD