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non-volatile memory device

A non-volatile storage and device technology, applied in static memory, read-only memory, digital memory information and other directions, can solve problems such as increasing precharge time

Active Publication Date: 2020-09-08
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, according to this normal operation, the precharge time is increased since the bit line needs to be precharged with one of three different levels

Method used

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Embodiment Construction

[0028] Various embodiments of the invention will be described in more detail below with reference to the accompanying drawings. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the invention to those skilled in the relevant art. Throughout this disclosure, like reference numerals refer to like parts throughout the various figures and embodiments of the invention. It should also be noted that in this specification, "connected / coupled" not only means that one component is directly coupled to another component, but also means that one component is indirectly coupled to another component through an intermediate component. It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or...

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Abstract

A nonvolatile memory device may include: a cell string including a plurality of memory cells coupled in series; a bit line coupled to the cell string; a page buffer suitable for use during normal program operation, slow program operation, and program inhibit driving the sense node to a ground voltage, an intermediate voltage, and a core voltage, respectively, during operation; and a connection unit adapted to respond to a control signal of the first voltage during a slow program operation and to respond to a high voltage during a normal program operation and a program inhibit operation. The control signal at the second voltage of the first voltage couples the bit line to the sensing node.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2015-0159694 filed on Nov. 13, 2015, which is hereby incorporated by reference in its entirety. technical field [0003] Exemplary embodiments of the present invention relate to a nonvolatile memory device. Background technique [0004] Nonvolatile memory devices retain data stored therein even when power to the device is turned off. Data can be stored in non-volatile memory by varying the threshold voltage of the memory cell to control the amount of charge that remains in the conduction band of the floating gate. [0005] Generally, when a program pulse is applied to the floating gate, the threshold voltage of the memory cell rises. The threshold voltage of a memory cell may be changed using a program pulse according to the value of data to be stored in the memory cell. Since multiple memory cells of a non-volatile memory can have slightly diffe...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/12
CPCG11C7/12G11C16/10G11C16/24G11C16/30G11C11/5628G11C11/5642G11C16/0483
Inventor 权奇昌
Owner SK HYNIX INC