High-electron-mobility transistor and preparation method thereof

A high electron mobility and transistor technology, applied in the field of microelectronics, can solve the problems of leakage and instability of high electron mobility transistors, and achieve the effects of reducing parasitic capacitance, small leakage and increasing frequency

Inactive Publication Date: 2017-05-31
NORTHWESTERN POLYTECHNICAL UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a high electron mobility transistor with higher reliability, which overcomes the technical problem that p-type characteristics will appear when Si is doped in GaSb and AlSb. In addition, the present invention It solves the problem of high electron mobility transistor leakage and instability in the prior art due to the absence of a dielectric layer or the defect of a dielectric layer

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  • High-electron-mobility transistor and preparation method thereof

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Embodiment 1

[0016] Embodiment 1 A high electron mobility transistor, which comprises an n-type GaAs substrate 1, a GaAs epitaxial layer 2 with a thickness of 150 nm, an AlGaSb buffer layer 3 with a thickness of 600 nm, and a lower AlSb barrier layer 4 with a thickness of 70 nm, An InAs channel layer 5 with a thickness of 12nm, an upper AlSb barrier layer 6 with a thickness of 5nm, an InAlAs hole blocking layer 7 with a thickness of 6nm, an InAs cap layer 8 with a thickness of 4nm, HfO 2 Gate dielectric layer 9 and metal layer 10, the structure of the high electron mobility transistor is arranged in order from bottom to top: n-type GaAs substrate 1, GaAs epitaxial layer 2 with a thickness of 150 nm, AlGaSb buffer layer 3 with a thickness of 600 nm, A lower AlSb barrier layer 4 with a thickness of 70nm, an InAs channel layer 5 with a thickness of 12nm, an upper AlSb barrier layer 6 with a thickness of 5nm, an InAlAs hole blocking layer 7 with a thickness of 6nm, and an InAs cap layer with a ...

Embodiment 2

[0017] Embodiment 2 A high electron mobility transistor, which comprises an n-type GaAs substrate 1, a GaAs epitaxial layer 2 with a thickness of 150nm, an AlGaSb buffer layer 3 with a thickness of 600nm, and a lower AlSb barrier layer 4 with a thickness of 70nm, The lower AlSb barrier layer 4 is doped with Si at a concentration of 2×10 18 cm -3 ; Thickness is the InAs channel layer 5 of 12nm, and the InAs channel layer 5 is doped with Si and its concentration is 5×10 17 cm -3 , an upper AlSb barrier layer with a thickness of 5nm, in which the elemental ratio of In:Al:As is 1:1:26, an InAlAs hole blocking layer 7 with a thickness of 6nm, an InAs cap layer 8 with a thickness of 4nm, in the InAs cap layer Middle-doped right Si with a doping concentration of 2×10 19 cm -3 , HfO2 gate dielectric layer 9 and metal layer 10, the structure of the high electron mobility transistor is arranged from bottom to top in order of n-type GaAs substrate 1, GaAs epitaxial layer 2 with a thi...

Embodiment 3

[0021] Embodiment 3 The present invention also provides a preparation method for the above-mentioned high electron mobility transistor, which specifically includes the following steps: the first step: cleaning the n-type GaAs semi-insulating substrate sample; specifically including (a) setting the doping concentration to lx 10 18 cm -3 Highly doped n-type 4H-SiC substrate sample in NH 4 OH+H 2 o 2 Soak the sample in the reagent for 10 minutes, take it out and dry it to remove the organic residue on the surface of the sample; (b) use HCl+H on the sample after removing the organic residue on the surface 2 o 2 Soak the sample in the reagent for 10 minutes, take it out and dry it to remove ionic pollutants; (c) soak the sample in 5% HF solution for 3 minutes to remove the surface oxide layer, and then ultrasonically clean it in deionized water for 5 minutes. The second step: put the cleaned sample into the MBE growth chamber, raise the temperature to 680°C in the As atmospher...

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Abstract

The invention belongs to the field of microelectronic technology, and especially relates to a high-electron-mobility transistor and a preparation method thereof. The high-electron-mobility transistor specifically comprises an n-type GaAs substrate (1), a GaAs epitaxial layer (2) with the thickness of 150nm, an AlGaSb buffer layer (3) with the thickness of 600nm, a lower AlSb barrier layer (4) with the thickness of 70nm, an InAs channel layer (5) with the thickness of 12nm, an upper AlSb barrier layer (6) with the thickness of 5nm, an InAlAs hole blocking layer (7) with the thickness of 6nm, an InAs cap layer (8) with the thickness of 4nm, an HfO2 gate dielectric layer (9) and a metal layer (10). By adopting the high-electron-mobility transistor and the preparation method thereof disclosed by the invention, the technical problem that p-type characteristics occur when Si is doped into GaSb and AlSb in the prior art can be solved, and the technical problem that the high-electron-mobility transistor has electric leakage and instability because no dielectric layer is arranged or the dielectric layer has defects in the prior art can be further solved.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a high electron mobility transistor and a preparation method thereof. Background technique [0002] High Electron Mobility Transistor (HEMT), also known as Heterojunction Field Effect Transistor (HFET) or Modulation Doped Field Effect Transistor (MODFET), generally utilizes a junction formed by two materials with different band gaps, such as a heterojunction The replacement doped region acts as a channel. High electron mobility transistors benefit from heterostructures, taking advantage of the high-mobility electrons generated by heterojunctions made of, for example, highly doped wide-bandgap n-type donor layers or unintentionally doped AlGaN wide-bandgap layers and an undoped narrow bandgap layer (eg, a GaN layer) with little or no intentional dopant. Since the heterojunction is formed by a material with a different bandgap that forms an electronic potenti...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/778H01L21/336H01L29/06H01L29/423
CPCH01L29/778H01L29/0603H01L29/0684H01L29/4232H01L29/42364H01L29/66462H01L29/7786
Inventor 关赫杜永乾张双喜
Owner NORTHWESTERN POLYTECHNICAL UNIV
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