Spaceborne high-speed LVDS parallel signal quick test and analysis method

Abstract

The invention provides a spaceborne high-speed LVDS parallel signal quick test and analysis method. The method comprises the following steps: 1, an LVDS signal standard time domain graph model is built; 2, according to an interface specification of tested signals, a signal cycle and a signal judgment amplitude are calculated; 3, a hexagon test template with a time domain feature is formed; 5, a passive test module with matched signal features is selected; 5, test parameters for an oscilloscope and a differential probe are set; 6, single-channel LVDS signals are tested, and signal effectiveness is analyzed graphically; 7, the above steps are repeated to complete multichannel LVDS parallel signal test and analysis; and 8, test results of multiple channels of signals are fused, and high-speed LVDS parallel interface test and analysis are completed. The method is applicable to a parallel LVDS interface at each transmission rate, and technical problems that the LVDS parallel interface can not be quickly tested and accurately analyzed can be solved.

Description

technical field [0001] The invention relates to a method for fast testing and analysis of signals, in particular to a method for fast testing and analysis of on-board high-speed LVDS parallel signals. Background technique [0002] LVDS (Low Voltage Differential Signal) parallel signal is an important data transmission signal for spacecraft. Due to its low transmission voltage, strong anti-interference ability, high transmission rate, and high interface stability, it plays an important role in the field of spacecraft data transmission. important role. In data transmission applications, the LVDS parallel signal interface is required to transmit accurately and work stably, not affected by external environmental factors, nor between internal multi-channel parallel signals, and requires a comprehensive test of the interface signal function and performance and analyse. [0003] The data transmission rate of on-board LVDS parallel signals has developed from a few Mbps to hundreds...

AI Technical Summary

Problems solved by technology

The bit error rate test needs to build a complete set of data sending and receiving and comparison active system, which can adapt to the requirements of different transmission frequencies and transmission bit widths, and accumulate enough test samples according to the bit error rate requirements, not only the cost of testing equipment and testing process High, and it is impossible to effectively locate and analyze the occurrence of bit errors

TTL signal test needs to design a set of signal level conversion active equipment that matches the signal sending and receiving, which belongs to the signal internal conversion interface test and cannot directly reflect the characteristics of the LVDS signal as the external interface of the product.

[0005] If an LVDS parallel interface is required to adapt to different rates and bit widths and meet the requirements of normal data transmission, it is necessary to conduct comprehensive tests and characteristic analysis on various rates and bit width states. This is impossible to achieve with the original test method, and a new A fast test and analysis method for LVDS parallel signals

[0006] Therefore, the prior art LVDS parallel signal test method mainly has the technical problems of high test cost and unintuitive characteristic analysis

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