Video data input and output method, device and system
A technology of video data and input method, applied in the field of video processing, can solve problems such as off-chip cache bandwidth system performance bottleneck, storage access bandwidth is difficult to meet the read and write throughput requirements, etc., to reduce access bandwidth and power consumption, and reduce space occupancy, the effect of reducing equipment costs
Active Publication Date: 2017-07-14
HISENSE VISUAL TECH CO LTD
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Problems solved by technology
However, at the current technological level, the bandwidth of storage access is difficult to meet such high read and write throughput requirements, and the off-chip cache bandwidth becomes the bottleneck restricting system performance
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[0078] In order to make the above objects, features and advantages of the present application more obvious and comprehensible, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0079] refer to figure 1 As shown, it is a schematic diagram of an existing ultra-high-definition video frame rate up-conversion system, which specifically includes: a video input module 11, an off-chip cache 12, an ultra-high-definition video frame rate up-conversion processing core 13, and a video output module 14; 11 Input the original video frame to the off-chip cache 12; the UHD video frame rate up-conversion processing core 13 extracts the original video frame from the off-chip cache 12, and performs a series of motion estimation, vector post-processing and internal processing on the extracted original video frame The interpolation operation generates an interpolated video frame, and finally sends ...
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The embodiment of the application provides a video data input method, applied to a video post-processing system. The video post-processing system comprises a block-to-be-compressed cache and a compressed bitstream cache. The method comprises the following steps: receiving the video frame data to be processed from at least two paths; dividing the video frame data to be processed into multiple blocks to be compressed; inputting the blocks to be compressed of one of the paths to the block-to-be-compressed cache according to the number of the blocks to be compressed of the two paths; sequentially compressing the blocks to be compressed in the block-to-be-compressed cache to generate a compressed bitstream; and inputting the compressed bitstream to the compressed bitstream cache. According to the video data input method provided by the embodiment of the application, the video frame data is firstly compressed, and then the compressed bitstream obtained by compression is input to the compressed bitstream cache, and thus the access bandwidth and power consumption of the compressed bitstream cache can be reduced.
Description
technical field [0001] The present application relates to the technical field of video processing, in particular to a video data input method, a video data output method, a video data input device, a video data output device and a video data system. Background technique [0002] In recent years, people's subjective demand for high-quality visual enjoyment and the objective conditions of the rapid development of semiconductor technology have jointly promoted the vigorous development of the UHD TV industry. However, due to the limitation of the bandwidth of the current transmission system, UHD TV programs can only be transmitted at a lower frame rate. At the same time, the refresh rate of large-screen display devices has been greatly improved, and the video frame rate is lower than the screen refresh rate. This mismatch directly leads to image smearing, pauses, blurring, etc., and the display effect is not good. As an important video post-processing method, the video frame ra...
Claims
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IPC IPC(8): H04N19/85H04N19/593H04N19/176H04N19/423H04N19/182
CPCH04N19/176H04N19/182H04N19/423H04N19/593H04N19/85
Inventor 刘卫东
Owner HISENSE VISUAL TECH CO LTD