Method for making multilayer structure on substrate and multilayer element

Abstract

The invention provides a method of fabricating a multilayer structure comprising: providing a mask on a component stack disposed on a substrate, the component stack comprising a first plurality of layers of a first layer type and a second layer type; ejecting first ions in a first direction forming a first non-zero angle of incidence with respect to a normal to the plane of the substrate, wherein a first sidewall is formed having a sidewall angle opposite to forming a first non-zero tilt angle at the normal, the first sidewall comprising a second plurality of layers derived from at least a portion of the first plurality of layers formed by the first one layer type and the second layer type; and etching the second plurality of layers using a first selective etch, wherein the first layer type is etched selectively relative to the second layer type. The invention further provides a multi-layer element.

Description

technical field [0001] Embodiments of the present invention relate to substrate processing, and more particularly, to a method for fabricating a multilayer structure on a substrate and a multilayer device. Background technique [0002] As semiconductor components scale to smaller dimensions, a need arises to develop three-dimensional structures to provide more component functionality within a given area on a substrate. Examples of the three-dimensional structure include Fin Field Effect Transistor (finFET) logic elements and three-dimensional (3-D) memory elements. One example of a three-dimensional memory that has drawn recent attention is a type of flash memory known as a vertical NAND (NAND) element or vertical NAND (VNAND) element. In certain specific embodiments, VNAND elements are implemented by fabricating 16, 32, or 64 layers for use as storage elements. In one variation, to access the different layers, the VNAND device stack can be patterned using a mask assembly ...

AI Technical Summary

Problems solved by technology

Furthermore, after such extensive etching operations are performed, the shape of such element structures can be compromised, resulting in a less reliable process

In addition, the resist trimming operation can result in a reduced size of the mask assembly along all sides of the square or rectangular resist shape, allowing the square pyramidal element structure to occupy a large projected area on the substrate

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