Phase interpolator

Abstract

The application provides a phase interpolator which comprises a first resistor, a second resistor, six sets of transistor circuits and M current switching units, wherein each set of transistor circuit respectively comprises a first NMOS transistor, a second NMOS transistor and a third NMOS transistor; drain electrodes of the first NMOS transistors are connected with one end of the first resistor; drain electrodes of the second NMOS transistors are connected with one end of the second resistor; source electrodes of the first NOMS transistors and source electrodes of the second NMOS transistors are respectively connected with drain electrodes of the third NMOS transistors; in the six sets of transistor circuits, source electrodes of the third NMOS transistors in three sets of transistor circuits are respectively connected with first ends of the M current switching units; and source electrodes of the third NMOS transistors in the other three sets of transistor circuits are respectively connected with second ends of the M current switching units. According to the phase interpolator provided by the application, accuracy of an output clock signal and phase controllability are improved.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, in particular to a phase interpolator. Background technique [0002] A phase interpolator (phase interpolator, PI) is widely used in integrated circuits to make the output clock signal have high precision and phase controllability. [0003] Such as figure 1 As shown, the input terminal of the existing phase interpolator usually receives two groups of differential clock signals, that is, two groups of signals whose phases are completely opposite to each other, respectively I, I - , Q, Q - , by adjusting I, I - , Q, Q - The weight value of , so as to produce a specific output phase. In the existing phase interpolator, the interval step of each clock signal phase is longer, and the increment of the clock phase is larger. [0004] Specifically, the phase interpolation technology uses trigonometric function induction formulas to add two single-tone sine or cosine signals wi...

AI Technical Summary

Problems solved by technology

[0005] In the phase interpolator that inputs 2 sets of differential clock signals, the 2 sets of differential clock signals are in quadrature, such as figure 2 As shown, the phase difference of each adjacent clock signal is 90°. Taking an adjacent clock signal as an example, its number of digits is N, and there are N input digital control codes, and the step size is The incremental adjustment of its clock phase is Obviously, the precision value of the clock signal is low, and the phase control is not precise

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