Unlock instant, AI-driven research and patent intelligence for your innovation.

Chip testing pedestal

A chip testing and base technology, applied in the direction of single semiconductor device testing, measuring electricity, measuring devices, etc., can solve the problems of heavy workload, high cost, unfavorable cost saving, etc.

Active Publication Date: 2017-10-10
MORNINGCORE HLDG CO LTD
View PDF9 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, at present, it is necessary to design and manufacture a large number of chip test bases for different Ballmap chips. Not only the workload is heavy, but also the cost is high, which leads to serious waste and is not conducive to cost saving.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip testing pedestal
  • Chip testing pedestal
  • Chip testing pedestal

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] In order to make the objectives, technical solutions and advantages of the present invention clearer, each embodiment of the present invention will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can appreciate that, in the various embodiments of the present invention, many technical details are set forth in order for the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the claims of the present application can be realized.

[0027] The first embodiment of the present invention relates to a chip test base, which can meet the test requirements of chips with the same Ballpitch. Ballpitch refers to the contact pitch of the chip, including the row pitch and column pitch of the chip contacts. The chip test base includes a base body and N positioning ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of chip testing devices and discloses a chip testing pedestal. The chip testing pedestal comprises a pedestal body and N positioning plates that can be movably arranged on the pedestal body, wherein N is a natural number which is greater than 1, a chip bearing area is preset on the pedestal body, contact points corresponding to connection point intervals of chips to be tested are uniformly arranged in the chip bearing area, a placement area for placing the chips to be tested is formed via enclosure of the N positioning plates in the chip bearing area, and at least two of the N positioning plates can move in planes different from the one that the pedestal body is in. Compared with technologies of the prior art, the chip testing pedestal is advantageous in that universality of the chip testing pedestal can be improved, and therefore costs can be lowered.

Description

technical field [0001] The invention relates to the technical field of chip testing equipment, in particular to a chip testing base. Background technique [0002] Generally speaking, after the chip is manufactured, it needs to be tested to ensure the correctness of the function of the chip. The traditional method of chip testing is to first fix a special test socket (Socket) for chip testing on a printed circuit board (such as a mobile phone motherboard, etc.). Then, the chip to be tested is placed in the test base, and the contacts of the chip to be tested are electrically connected to the printed circuit board through the test base, so as to perform chip testing. [0003] At present, commonly used chip packaging forms include PGA (abbreviation for Pin Grid Array, pin grid array), BGA (abbreviation for Ball Grid Array, ball grid array) and the like. According to the packaging structure of the chip, the chip test base is also divided into a PGA chip test base and a BGA chi...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G01R31/26
CPCG01R31/2601
Inventor 王会博
Owner MORNINGCORE HLDG CO LTD