Structured LDPC coding and decoding method and device

An LDPC code and coding method technology, applied in the decoding method and device, the coding field of structured low-density parity check codes, can solve the problems of inability to support incremental redundancy HARQ and flexibility, insufficiency, etc., to achieve coding and decoding performance effect

Active Publication Date: 2017-11-21
ZTE CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0078] Embodiments of the present invention provide a structured LDPC encoding and decoding method and device to at least solve the problems that the existing LDPC codecs in the related art cannot support incremental redundancy HARQ and lack flexibility

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  • Structured LDPC coding and decoding method and device
  • Structured LDPC coding and decoding method and device
  • Structured LDPC coding and decoding method and device

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Embodiment 1

[0112] An embodiment of the present invention provides a coding device for structured low-density parity-check code LDPC in digital communication, the structure of which is as follows figure 2 As shown, at least a processor 202 and a memory 201 are included.

[0113] The memory 201 is configured to at least store a fundamental matrix used in encoding.

[0114] The basic matrix includes a block A of Mb×Kb corresponding to systematic bits and a block B of Mb×Mb corresponding to parity bits, that is, Hb=[A,B], where hb ij Represent the elements of the ith row and j column of the basic matrix, i is the row index of the basic matrix, j is the column index of the basic matrix, Kb=Nb-Mb, Nb is an integer, and Kb is greater than or equal to 4 an integer of . i=1,...,Mb, j=1,...,Nb.

[0115] Described basic matrix Hb comprises one or more sub-matrixes, and described sub-matrix comprises: sub-matrix Hb1 of upper left corner and sub-matrix Hb2 of upper left corner, wherein, the numbe...

Embodiment 2

[0150] An embodiment of the present invention provides a decoding device for a structured low-density parity-check code LDPC in digital communication, the structure of which is as follows Figure 4 As shown, at least a processor 402 and a memory 401 are included.

[0151] The memory 401 is configured to at least store a fundamental matrix used in encoding. The basic parity check matrix includes the following features:

[0152] The basic matrix includes a block A of Mb×Kb corresponding to systematic bits and a block B of Mb×Mb corresponding to parity bits, that is, Hb=[A,B], where hb ij Represent the elements of the ith row and j column of the basic matrix, i is the row index of the basic matrix, j is the column index of the basic matrix, Kb=Nb-Mb, Kb is an integer greater than or equal to 4, Nb is an integer. i=1,...,Mb, j=1,...,Nb.

[0153] Described basic matrix Hb comprises one or more sub-matrixes, and described sub-matrix comprises: sub-matrix Hb1 of upper left corner...

Embodiment 3

[0184] The embodiment of the present invention provides a coding method of a structured LDPC code, and the process of using this method to complete LDPC coding is as follows: Figure 5 shown, including:

[0185] Step 501, determine the basic matrix Hb used for encoding;

[0186] Optionally, the basic parity check matrix includes the following features:

[0187] The basic matrix includes a block A of Mb×Kb corresponding to systematic bits and a block B of Mb×Mb corresponding to parity bits, that is, Hb=[A,B], where hb ij Represent the elements of the ith row and j column of the basic matrix, i is the row index of the basic matrix, j is the column index of the basic matrix, Kb=Nb-Mb, Kb is an integer greater than or equal to 4, Nb is an integer. i=1,...,Mb, j=1,...,Nb.

[0188] Optionally, the basic matrix Hb at least further includes the following features: the basic matrix Hb includes one or more sub-matrices, and the sub-matrices include: the upper left sub-matrix Hb1 and...

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Abstract

The invention provides a structured LDPC coding and decoding method and device. The coding method comprises the following steps: a basic matrix used for coding operation is determined, and the basic matrix comprises one or more sub-matrixes; the sub-matrixes comprise a top left corner matrix Hb1 and a top left corner matrix Hb2, a number of lines and a number of rows of each of the top left corner matrix Hb1 and the top left corner matrix Hb2 are lower than a number of lines and a number of rows of the basic matrix, and the top left corner matrix Hb1 is a top left corner matrix for the top left corner matrix Hb2; according to the basic matrix and an expansion factor Z corresponding to the basic matrix, LDPC coding operation is conducted on a source information bit sequence, a code word sequence is obtained, and Z is a positive integer which is larger than or equal to 1. Via adoption of the structured LDPC coding and decoding method and device disclosed a technical solution provided in the invention, a problem that an LDPC coding and decoding device of relevant technologies cannot support progressive increase redundancy HARQ and is in sufficient in flexibility can be solved.

Description

technical field [0001] The present invention relates to the communication field, in particular, to a method and device for encoding and decoding structured Low Density Parity Check Codes (LDPC for short). Background technique [0002] With the development of wireless digital communication and the emergence of various high-speed and bursty services, people have put forward higher and higher requirements for error correction coding technology. figure 1 It is a typical digital communication system. LDPC is a type of linear block code that can be defined by a very sparse parity check matrix or a bipartite graph. It was originally discovered by Gallager, so it is called Gallager code. After decades of silence, with the development of computer hardware and related theories, MacKay and Neal rediscovered it and proved that it has performance close to the Shannon limit. The latest research shows that LDPC codes have the following characteristics: low decoding complexity, linear tim...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
CPCH03M13/1148H03M13/116H03M13/1188H03M13/6393H03M13/6516H03M13/036Y02D30/70H03M13/6508H03M13/616
Inventor 徐俊
Owner ZTE CORP
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