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Semiconductor device and manufacturing method therefor, and electronic apparatus

A semiconductor and device technology, applied in the field of semiconductor manufacturing technology, can solve the problem of large active area of ​​the chip and achieve the effect of reducing the area

Inactive Publication Date: 2017-12-12
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] When the 1C that constitutes the PseudoSRAM storage unit is manufactured using the existing technology, it occupies a large area of ​​the active area of ​​the chip

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  • Semiconductor device and manufacturing method therefor, and electronic apparatus
  • Semiconductor device and manufacturing method therefor, and electronic apparatus
  • Semiconductor device and manufacturing method therefor, and electronic apparatus

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Abstract

The invention provides a semiconductor device and a manufacturing method therefor, and an electronic apparatus. The manufacturing method comprises the following steps of providing a semiconductor substrate formed with isolation structures, and forming a gate dielectric layer, a gate material layer and a dielectric layer on the semiconductor substrate in sequence; performing patterning on the gate dielectric layer, the gate material layer and the dielectric layer which are stacked in sequence to form capacitor stacked layer structures on the isolation structures and MOS transistor gate stacked layer structures positioned on the semiconductor substrate among the isolation structures; forming side wall structures between the two sides of the capacitor stacked layer structures and the MOS transistor gate stacked layer structures; depositing an inner connecting material layer, and covering the dielectric layer, the side wall structures, the isolation structures and the semiconductor substrate; and performing patterning of the inner connecting material layer to form a first inner connecting layer, and extending the source of the MOS transistor to the corresponding capacitor stacked layer structure of the adjacent isolation structure through the first inner connecting layer. By virtue of the manufacturing method, the occupation area of a memory unit of a pseudo static random access memory on the active region of a chip can be reduced effectively.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] Pseudo static random access memory (Pseudo SRAM) has the advantages of large memory capacity, low cost, high frequency speed, and low power consumption. Its storage unit is composed of 1T (transistor) + 1C (capacitor). [0003] When the 1C that constitutes the PseudoSRAM storage unit is manufactured using the existing technology, it occupies a large area of ​​the active area of ​​the chip, and the isolation structure in the chip only plays the role of isolating the 1T and 1C that constitute the PseudoSRAM storage unit, and no further steps are taken. use. Contents of the invention [0004] Aiming at the deficiencies of the prior art, the present invention provides a method for manufacturing a semiconductor device, comprising: providing a semiconductor substrat...

Claims

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Application Information

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IPC IPC(8): H01L27/11H01L21/8244
CPCH10B10/12
Inventor 杨晓芳王鷁奇蔡建祥
Owner SEMICON MFG INT (SHANGHAI) CORP