A highly-efficient boundary scan testing system

Abstract

The present invention provides a high-efficiency boundary-scan testing system, including a PC and a boundary-scan tester, characterized in that: the boundary-scan tester includes a first signal transceiving module, and the first signal transceiving module is connected with a JTAG controller, Described JTAG controller is connected with several test stations in parallel by JTAG bus, and each test station comprises TAP controller; Described PC includes the second signal transceiving module; Described first signal transceiving module and the second signal transceiving module Modules communicate with each other via LAN. The invention has high testing efficiency, low testing cost and convenient use.

Description

technical field [0001] The invention relates to a boundary scan test device in the field of electronic communication, in particular to a high-efficiency boundary scan test system. Background technique [0002] As circuit technology enters the era of ultra-large-scale integration, the high complexity of ultra-large-scale integrated circuits, and the application of multi-layer printed boards, surface mount, wafer-scale integration and multi-chip module technologies in circuit systems, all make circuit nodes The physical accessibility of electronic devices is gradually weakening or even disappearing. The reduction in circuit board size, the increase in component pins and the increase in functional density on the board have greatly reduced the test points that can be left for probes. The traditional online test system has been unable to test To satisfy the testing of such products, a new testing technology has been produced, and the joint testing behavior organization defines th...

AI Technical Summary

Problems solved by technology

[0002] As circuit technology enters the era of ultra-large-scale integration, the high complexity of ultra-large-scale integrated circuits, and the application of multi-layer printed boards, surface mount, wafer-scale integration and multi-chip module technologies in circuit systems, all make circuit nodes The physical accessibility of electronic devices is gradually weakening or even disappearing. The reduction in circuit board size, the increase in component pins and the increase in functional density on the board have greatly reduced the test points that can be left for probes. The traditional online test system has been unable to test To meet the test of this kind of products, a new test technology has been produced, and the joint test behavior organization defines this new test method as boundary scan test

However, at present, many boundary scan testers have low test efficiency and cannot test different circuit boards at the same time, which also brings about an increase in test costs.

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